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MCIMX6D6AVT08ACR 其他数据使用手册 - NXP（恩智浦）
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NXP（恩智浦）
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微处理器
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FCBGA-624
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MCIMX6D6AVT08ACR数据手册
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NXP Semiconductors
Data Sheet: Technical Data
Document Number: IMX6SXIEC
Rev. 2, 6/2016
MCIMX6XxCxxxxxB
Package Information
Plastic Package
BGA 19 x 19 mm, 0.8 mm pitch
BGA 17 x 17 mm, 0.8 mm pitch
BGA 14 x 14 mm, 0.65 mm pitch
Ordering Information
See Table 1 on page 3
© 2016 NXP B.V.
1 Introduction
The i.MX 6SoloX processors represent NXP
Semiconductor's latest achievement in integrated
multimedia-focused products offering high-performance
processing with a high degree of functional integration to
meet the demands of high-end, advanced industrial and
medical applications requiring graphically rich and
highly responsive user interfaces.
The i.MX 6SoloX processor features NXP’s advanced
implementation of the single ARM® Cortex®-A9 core,
which operates at speeds of up to 800 MHz, in addition
to the ARM Cortex-M4 core, which operates at speeds of
up to 227 MHz. This type of heterogeneous multicore
architecture provides greater levels of system
integration, smart low-power system awareness, and fast
real-time responsiveness. The i.MX 6SoloX includes a
GPU processor capable of supporting 2D and 3D
operations, a wide range of display and connectivity
i.MX 6SoloX Applications
Processors for Industrial
Products
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . .3
1.2Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2 Architectural Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
3 Modules List. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
3.1 Special Signal Considerations . . . . . . . . . . . . . . . . . . .19
3.2 Recommended Connections for Unused Analog
Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
4 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . .21
4.1 Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . . . . .21
4.2 Power Supplies Requirements and Restrictions . . . . .34
4.3 Integrated LDO Voltage Regulator Parameters . . . . . .35
4.4 PLL’s Electrical Characteristics . . . . . . . . . . . . . . . . . .37
4.5 On-Chip Oscillators . . . . . . . . . . . . . . . . . . . . . . . . . . .38
4.6 I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . .39
4.7 I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . .44
4.8 Output Buffer Impedance Parameters . . . . . . . . . . . . .48
4.9 System Modules Timing. . . . . . . . . . . . . . . . . . . . . . . .52
4.10 Multi-mode DDR Controller (MMDC) . . . . . . . . . . . . .64
4.11 General-Purpose Media Interface (GPMI) Timing . . .66
4.12 External Peripheral Interface Parameters . . . . . . . . .74
4.13 A/D converter and Video A/D converters. . . . . . . . . 119
5 Boot Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . . .126
5.1 Boot Mode Configuration Pins . . . . . . . . . . . . . . . . . .126
5.2 Boot Device Interface Allocation . . . . . . . . . . . . . . . .128
6 Package Information and Contact Assignments . . . . . . .135
6.1 i.MX 6SoloX signal availability by package . . . . . . . .135
6.2 Signals with different states during reset and after
reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .138
6.3 19x19 mm Package Information . . . . . . . . . . . . . . . .140
6.4 17x17 mm Package Information . . . . . . . . . . . . . . . .160
6.5 14x14 mm Package Information . . . . . . . . . . . . . . . .195
7 Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .213
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