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STD13N60M2 产品封装文件 - ST Microelectronics（意法半导体）
制造商:
ST Microelectronics（意法半导体）
分类:
MOS管
封装:
TO-252-3
描述:
N 通道 MDmesh™ M2 系列，STMicroelectronicsMDmesh M2 系列功率 MOSFET 非常适合用于谐振型电源（LLC 转换器）。 其配置具有低栅极电荷，以及极佳的输出电容。### MOSFET 晶体管，STMicroelectronics
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STD13N60M2数据手册
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2 Electrical characteristics
T
C
= 25 °C unless otherwise specified
Table 4. On/off-states
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source breakdown
voltage
V
GS
= 0 V, I
D
= 1 mA
600 V
I
DSS
Zero-gate voltage drain
current
V
GS
= 0 V, V
DS
= 600 V
1 µA
V
GS
= 0 V, V
DS
= 600 V, T
C
= 125 °C
(1)
100 µA
I
GSS
Gate-body leakage current
V
DS
= 0 V, V
GS
= ±25 V
±10 µA
V
GS(th)
Gate threshold voltage
V
DS
= V
GS
, I
D
= 250 µA
2 3 4 V
R
DS(on)
Static drain-source on-
resistance
V
GS
= 10 V, I
D
= 5.5 A
0.35 0.38 Ω
1. Defined by design, not subject to production test.
Table 5. Dynamic
Symbol
Parameter Test conditions Min. Typ. Max. Unit
C
iss
Input capacitance
V
DS
= 100 V, f = 1 MHz, V
GS
= 0 V
- 580 - pF
C
oss
Output capacitance - 32 - pF
C
rss
Reverse transfer capacitance - 1.1 - pF
C
oss eq.
(1)
Equivalent output capacitance
V
DS
= 0 to 480 V, V
GS
= 0 V
- 120 - pF
R
G
Intrinsic gate resistance
f = 1 MHz, I
D
= 0 A
- 6.6 - Ω
Q
g
Total gate charge
V
DD
= 480 V, I
D
= 11 A, V
GS
= 0 to 10 V
(see Figure 16. Test circuit for gate
charge behavior)
- 17 - nC
Q
gs
Gate-source charge - 2.5 - nC
Q
gd
Gate-drain charge - 9 - nC
1. C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0
to 80% V
DSS.
Table 6. Switching times
Symbol
Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
Turn-on delay time
V
DD
= 300 V, I
D
= 5.5 A, R
G
= 4.7 Ω,
V
GS
= 10 V (see Figure 15. Test circuit for
resistive load switching times and
Figure 20. Switching time waveform)
- 11 - ns
t
r
Rise time - 10 - ns
t
d(off)
Turn-off-delay time - 41 - ns
t
f
Fall time - 9.5 - ns
STB13N60M2, STD13N60M2
Electrical characteristics
DS9632 - Rev 5
page 3/23
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