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MSP430F5419AIZQW 产品设计参考手册 - TI(德州仪器)
制造商:
TI(德州仪器)
分类:
微控制器
封装:
VFBGA
描述:
混合信号微控制器 MIXED SIGNAL MICROCONTROLLER
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P7P8P9P69P71P72P74P76P78P79P81P83Hot
典型应用电路图在P2
原理图在P3P68
封装尺寸在P6P100P101P103P104
标记信息在P97P100P101
封装信息在P2P6P97P99P100P101P102P103P104
技术参数、封装参数在P15P16P17P18P19P20P21P22P23P24P25P26
应用领域在P1P88P102P108
导航目录
MSP430F5419AIZQW数据手册
Page:
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若手册格式错乱,请下载阅览PDF原文件

MSP430F5438A
,
MSP430F5437A
,
MSP430F5436A
,
MSP430F5435A
MSP430F5419A, MSP430F5418A
SLAS655E –JANUARY 2010–REVISED JULY 2015
www.ti.com
3 Device Comparison
Table 3-1 summarizes the available family members.
Table 3-1. Family Members
(1)(2)
USCI
FLASH SRAM ADC12_A
CHANNEL A: CHANNEL B:
DEVICE Timer_A
(3)
Timer_B
(4)
I/O PACKAGE
(KB) (KB) (Ch)
UART, IrDA, SPI, I
2
C
SPI
100 PZ,
MSP430F5438A 256 16 5, 3 7 4 4 14 ext, 2 int 87
113 ZQW
MSP430F5437A 256 16 5, 3 7 2 2 14 ext, 2 int 67 80 PN
100 PZ,
MSP430F5436A 192 16 5, 3 7 4 4 14 ext, 2 int 87
113 ZQW
MSP430F5435A 192 16 5, 3 7 2 2 14 ext, 2 int 67 80 PN
100 PZ,
MSP430F5419A 128 16 5, 3 7 4 4 14 ext, 2 int 87
113 ZQW
MSP430F5418A 128 16 5, 3 7 2 2 14 ext, 2 int 67 80 PN
(1) For the most current part, package, and ordering information, see the Package Option Addendum in Section 8, or see the TI website at
www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) Each number in the sequence represents an instantiation of Timer_A with its associated number of capture compare registers and PWM
output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_A, the first
instantiation having 3 and the second instantiation having 5 capture compare registers and PWM output generators, respectively.
(4) Each number in the sequence represents an instantiation of Timer_B with its associated number of capture compare registers and PWM
output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_B, the first
instantiation having 3 and the second instantiation having 5 capture compare registers and PWM output generators.
6 Device Comparison Copyright © 2010–2015, Texas Instruments Incorporated
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