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器件3D模型￥ 6.163
PIC24F16KL401-E/SS 数据手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
微控制器
封装:
SSOP-20
描述:
16位微控制器 - MCU PIC24F Core 8KB 1KB B RAM 512B EEPROM 3V
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P3P4P5P14P15P16P17P18P19P20P22P135Hot
原理图在P13P26P59P111P115P117P119P123P126P127P136P137
封装尺寸在P228
标记信息在P225
封装信息在P201P225P231P232P233P234P235P236P237P238P239P241
功能描述在P9P55P125
技术参数、封装参数在P201P206P207P209P211P213P223
电气规格在P62P174
导航目录
PIC24F16KL401-E/SS数据手册
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若手册格式错乱，请下载阅览PDF原文件
2011-2013 Microchip Technology Inc. DS30001037C-page 1
PIC24F16KL402 FAMILY
Power Management Modes:
• Run – CPU, Flash, SRAM and Peripherals On
• Doze – CPU Clock Runs Slower than Peripherals
• Idle – CPU Off, SRAM and Peripherals On
• Sleep – CPU, Flash and Peripherals Off and SRAM On
• Low-Power Consumption:
- Run mode currents of 150 µA/MHz typical at 1.8V
- Idle mode currents under 80 µA/MHz at 1.8V
- Sleep mode currents as low as 30 nA at +25°C
- Watchdog Timer as low as 210 nA at +25°C
High-Performance CPU:
• Modified Harvard Architecture
• Up to 16 MIPS Operation @ 32 MHz
• 8 MHz Internal Oscillator:
- 4x PLL option
- Multiple divide options
• 17-Bit x 17-Bit Single-Cycle Hardware
Fractional/integer Multiplier
• 32-Bit by 16-Bit Hardware Divider
• 16 x 16-Bit Working Register Array
• C Compiler Optimized Instruction Set
Architecture (ISA):
- 76 base instructions
- Flexible addressing modes
• Linear Program Memory Addressing
• Linear Data Memory Addressing
• Two Address Generation Units (AGU) for Separate
Read and Write Addressing of Data Memory
Peripheral Features:
• High-Current Sink/Source (18 mA/18 mA) on All
I/O Pins
• Configurable Open-Drain Outputs on Digital I/O Pins
• Up to Three External Interrupt Sources
• Two 16-Bit Timer/Counters with Selectable Clock
Sources
• Up to Two 8-Bit Timers/Counters with Programmable
Prescalers
• Two Capture/Compare/PWM (CCP) modules:
- Modules automatically configure and drive I/O
- 16-bit Capture with max. resolution 40 ns
- 16-bit Compare with max. resolution 83.3 ns
- 1-bit to 10-bit PWM resolution
• Up to One Enhanced CCP module:
- Backward compatible with CCP
- 1, 2 or 4 PWM outputs
- Programmable dead time
- Auto-shutdown on external event
• Up to Two Master Synchronous Serial Port modules
(MSSPs) with Two Modes of Operation:
- 3-wire SPI (all four modes)
-I
2
C™ Master, Multi-Master and Slave modes and
7-Bit/10-Bit Addressing
• Up to Two UART modules:
- Supports RS-485, RS-232 and LIN/J2602
- On-chip hardware encoder/decoder for IrDA
®
- Auto-wake-up on Start bit
- Auto-Baud Detect (ABD)
- Two-byte transmit and receive FIFO buffers
Device Pins
Memory Peripherals
Ultra Low-Power
Wake-up
Flash
Program
(bytes)
Data
(bytes)
Data
EEPROM
(bytes)
10-Bit A/D (ch)
Comparators
8/16-Bit
Timers
CCP/ECCP
MSSP
UART w/IrDA
®
PIC24F16KL402 28 16K 1024 512 12 2 2/2 2/1 2 2 Y
PIC24F08KL402 28 8K 1024 512 12 2 2/2 2/1 2 2 Y
PIC24F16KL401 20 16K 1024 512 12 2 2/2 2/1 2 2 Y
PIC24F08KL401 20 8K 1024 512 12 2 2/2 2/1 2 2 Y
PIC24F08KL302 28 8K 1024 256 — 2 2/2 2/1 2 2 Y
PIC24F08KL301 20 8K 1024 256 — 2 2/2 2/1 2 2 Y
PIC24F08KL201 20 8K 512 — 12 1 1/2 2/0 1 1 Y
PIC24F08KL200 14 8K 512 — 7 1 1/2 2/0 1 1 Y
PIC24F04KL101 20 4K 512 — — 1 1/2 2/0 1 1 Y
PIC24F04KL100 14 4K 512 — — 1 1/2 2/0 1 1 Y
Low-Power, Low-Cost, General Purpose
16-Bit Flash Microcontrollers with XLP Technology
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