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74HC00DTR2G
器件3D模型
0.374
导航目录
  • 引脚图在P2P3
  • 典型应用电路图在P2
  • 封装尺寸在P8P9P10P11
  • 型号编码规则在P1
  • 功能描述在P1P3
  • 技术参数、封装参数在P13
  • 应用领域在P13
74HC00DTR2G数据手册
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1. General description
The 74HC00; 74HCT00 is a quad 2-input NAND gate. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs to voltages in excess of
V
CC
.
2. Features and benefits
Input levels:
For 74HC00: CMOS level
For 74HCT00: TTL level
Complies with JEDEC standard no. 7A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
3. Ordering information
74HC00; 74HCT00
Quad 2-input NAND gate
Rev. 7 — 25 November 2015 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC00D 40 C to +125 C SO14 plastic small outline package; 14 leads; body width
3.9 mm
SOT108-1
74HCT00D
74HC00DB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body
width 5.3 mm
SOT337-1
74HCT00DB
74HC00PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74HCT00PW
74HC00BQ 40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5 3 0.85 mm
SOT762-1
74HCT00BQ

74HC00DTR2G 数据手册

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74HC00DTR2 数据手册

ON Semiconductor(安森美)
四2输入与非门高性能硅栅CMOS Quad 2-Input NAND Gate High-Performance Silicon-Gate CMOS
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