Datasheet 搜索 > 与非门芯片 > NXP（恩智浦） > 74HC20D 数据手册 > 74HC20D 其他数据使用手册 1/16 页
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74HC20D 其他数据使用手册 - NXP（恩智浦）
制造商:
NXP（恩智浦）
分类:
与非门芯片
封装:
SOIC
描述:
两个4输入与非门 Dual 4-input NAND gate
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74HC20D数据手册
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1. General description
The 74HC20; 74HCT20 is a dual 4-input NAND gate. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs to voltages in excess of
V
CC
.
2. Features and benefits
Complies with JEDEC standard JESD7A
Low-power dissipation
Input levels:
For 74HC20: CMOS level
For 74HCT20: TTL level
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 Cto+80C and from 40 Cto+125C.
3. Ordering information
74HC20; 74HCT20
Dual 4-input NAND gate
Rev. 3 — 3 September 2012 Product data sheet
Table 1. Ordering information
Type number Package
Temperature range Name Description Version
74HC20N 40 C to +125 C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1
74HCT20N
74HC20D 40 C to +125 C SO14 plastic small outline package; 14 leads; body width
3.9 mm
SOT108-1
74HCT20D
74HC20DB 40 C to +125 C SSOP14 plastic shrink small outline package; 14 leads; body
width 5.3 mm
SOT337-1
74HCT20DB
74HC20PW 40 C to +125 C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
SOT402-1
74HCT20PW
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