Datasheet 搜索 > AD转换器 > ADI（亚德诺） > AD7730BRZ 数据手册 > AD7730BRZ 其他数据使用手册 1/53 页
器件3D模型￥ 0.072
AD7730BRZ 其他数据使用手册 - ADI（亚德诺）
制造商:
ADI（亚德诺）
分类:
AD转换器
封装:
SOIC-24
描述:
ANALOG DEVICES AD7730BRZ 模数转换器, 24 bit, 1.2 kSPS, 单, 4.75 V, 5.25 V, WSOIC
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3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P7Hot
典型应用电路图在P40P41
原理图在P1P6P26P44
封装尺寸在P51
型号编码规则在P52
功能描述在P1P7P44
技术参数、封装参数在P1P2P4P43P45P47
应用领域在P1P6P24P40P44
导航目录
AD7730BRZ数据手册
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REV.
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
AD7730/AD7730L
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: © Analog Devices, Inc.,
Bridge Transducer ADC
FUNCTIONAL BLOCK DIAGRAM
KEY FEATURES
Resolution of 230,000 Counts (Peak-to-Peak)
Offset Drift: 5 nV/C
Gain Drift: 2 ppm/C
Line Frequency Rejection: >150 dB
Buffered Differential Inputs
Programmable Filter Cutoffs
Specified for Drift Over Time
Operates with Reference Voltages of 1 V to 5 V
ADDITIONAL FEATURES
Two-Channel Programmable Gain Front End
On-Chip DAC for Offset/TARE Removal
FAST
Step™ Mode
AC or DC Excitation
Single Supply Operation
APPLICATIONS
Weigh Scales
Pressure Measurement
GENERAL DESCRIPTION
The AD7730 is a complete analog front end for weigh-scale and
pressure measurement applications. The device accepts low-
level signals directly from a transducer and outputs a serial
digital word. The input signal is applied to a proprietary pro-
grammable gain front end based around an analog modulator.
FASTStep is a trademark of Analog Devices, Inc.
SIGMA-
DELTA
MODULATOR
AD7730
6-BIT
DAC
SERIAL INTERFACE
AND CONTROL LOGIC
REGISTER BANK
CLOCK
GENERATION
PROGRAMMABLE
DIGITAL
FILTER
SIGMA-DELTA A/D CONVERTER
BUFFER
PGA
100nA
AGND
100nA
AV
DD
VBIAS
AIN1(+)
AIN1(–)
AIN2(+)/D1
AIN2(–)/D0
ACX
ACX
STANDBY
SYNC
MCLK IN
MCLK OUT
SCLK
CS
DIN
DOUT
RESET
RDY
POL
DGNDAGND
AV
DD
DV
DD
REF IN(–)
REF IN(+)
MUX
REFERENCE DETECT
AC
EXCITATION
CLOCK
CALIBRATION
MICROCONTROLLER
+
+/–
The modulator output is processed by a low pass programmable
digital filter, allowing adjustment of filter cutoff, output rate and
settling time.
The part features two buffered differential programmable gain
analog inputs as well as a differential reference input. The part
operates from a single +5 V supply. It accepts four unipolar
analog input ranges: 0 mV to +10 mV, +20 mV, +40 mV and
+80 mV and four bipolar ranges: ± 10 mV, ± 20 mV, ± 40 mV
and ± 80 mV. The peak-to-peak resolution achievable directly
from the part is 1 in 230,000 counts. An on-chip 6-bit DAC
allows the removal of TARE voltages. Clock signals for synchro-
nizing ac excitation of the bridge are also provided.
The serial interface on the part can be configured for three-wire
operation and is compatible with microcontrollers and digital
signal processors. The AD7730 contains self-calibration and
system calibration options, and features an offset drift of less
than 5 nV/°C and a gain drift of less than 2 ppm/°C.
The AD7730 is available in a 24-pin plastic DIP, a 24-lead
SOIC and 24-lead TSSOP package. The AD7730L is available
in a 24-lead SOIC and 24-lead TSSOP package.
NOTE
The description of the functions and operation given in this data
sheet apply to both the AD7730 and AD7730L. Specifications
and performance parameters differ for the parts. Specifications
for the AD7730L are outlined in Appendix A.
B
2012
781/461-3113
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