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AD7788BRMZ
器件3D模型
19.88
导航目录
  • 引脚图在P9
  • 原理图在P1
  • 封装尺寸在P19
  • 型号编码规则在P19
  • 功能描述在P1P9
  • 技术参数、封装参数在P1P3P8
  • 应用领域在P1
  • 电气规格在P10
AD7788BRMZ数据手册
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Low Power, 16-/24-Bit,
Sigma-Delta ADCs
Data Sheet
AD7788/AD7789
Rev. C Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©20032016 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
FEATURES
AD7788: 16-bit resolution
AD7789: 24-bit resolution
Power
Supply: 2.5 V to 5.25 V operation
Normal: 75 µA maximum
Power-down: 1 µA maximum
RMS noise: 1.5 µV
AD7788: 16-bit p-p resolution
AD7789: 19-bit p-p resolution (21.5 bits effective)
Integral nonlinearity: 3.5 ppm typical
Simultaneous 50 Hz and 60 Hz rejection
Internal clock oscillator
V
DD
monitor channel
10-lead MSOP
INTERFACE
3-wire serial
SPI-, QSPI™-, MICROWIRE-, and DSP-compatible
Schmitt trigger on SCLK
APPLICATIONS
Smart transmitters
Battery applications
Portable instrumentation
Sensor measurement
Temperature measurement
Pressure measurement
Weigh scales
4 to 20 mA loops
FUNCTIONAL BLOCK DIAGRAM
03539-001
SERIAL
INTERFACE
AND
CONTROL
LOGIC
CLOCK
*AD7788: 16-BIT ADC
AD7789: 24-BIT ADC
AIN(+)
AIN(–)
GND
Σ-Δ
ADC*
AD7788/
AD7789
REFIN(+) REFIN(–) V
DD
DOUT/RDY
DIN
SCLK
CS
F
igure 1.
GENERAL DESCRIPTION
The AD7788/AD7789 are low power, low noise, analog front
ends for low frequency measurement applications. The AD7789
contains a low noise, 24-bit, ∑-analog-to-digital converter
(ADC) with one differential input. The AD7788 is a 16-bit
version of the AD7789.
The devices operate from an internal clock. Therefore, the user
does not have to supply a clock source to the devices. The output
data rate is 16.6 Hz, which gives simultaneous 50 Hz/60 Hz
rejection.
The devices operate with a single power supply from 2.5 V to
5.25 V. W hen operating from a 3 V supply, the power dissipation
for the device is 225 µW maximum. The AD7788/AD7789 are
available in a 10-lead MSOP.

AD7788BRMZ 数据手册

ADI(亚德诺)
20 页 / 0.33 MByte
ADI(亚德诺)
20 页 / 0.33 MByte
ADI(亚德诺)
4 页 / 0.12 MByte
ADI(亚德诺)
6 页 / 0.1 MByte
ADI(亚德诺)
1 页 / 0.12 MByte

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