Datasheet 搜索 > 微控制器 > Microchip（微芯） > AT91SAM7X512B-AUR 数据手册 > AT91SAM7X512B-AUR 其他数据使用手册 1/45 页
器件3D模型￥ 102.897
AT91SAM7X512B-AUR 其他数据使用手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
微控制器
封装:
LQFP-100
描述:
ARM MCU微控制单元, SAM32 Family AT91SAM7X Series Microcontrollers, ARM7TDMI, 32位, 55 MHz, 512 KB, 128 KB
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
原理图在P4P12P23P24P26P27
封装尺寸在P8P10P38P39P40
型号编码规则在P41
电气规格在P8P10
导航目录
AT91SAM7X512B-AUR数据手册
Page:
of 45 Go
若手册格式错乱，请下载阅览PDF原文件
NOTE: This is a summary document.
The complete document is available on
the Atmel website at www.atmel.com.
Features
• Incorporates the ARM7TDMI
®
ARM
®
Thumb
®
Processor
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
• Leader in MIPS/Watt
– EmbeddedICE
™
In-circuit Emulation, Debug Communication Channel Support
• Internal High-speed Flash
– 512 Kbytes (SAM7X512) Organized in Two Banks of 1024 Pages of
256 Bytes (Dual Plane)
– 256 Kbytes (SAM7X256) Organized in 1024 Pages of 256 Bytes (Single Plane)
– 128 Kbytes (SAM7X128) Organized in 512 Pages of 256 Bytes (Single Plane)
• Single Cycle Access at Up to 30 MHz in Worst Case Conditions
• Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed
• Page Programming Time: 6 ms, Including Page Auto-erase,
Full Erase Time: 15 ms
• 10,000 Write Cycles, 10-year Data Retention Capability,
Sector Lock Capabilities, Flash Security Bit
• Fast Flash Programming Interface for High Volume Production
• Internal High-speed SRAM, Single-cycle Access at Maximum Speed
– 128 Kbytes (SAM7X512)
– 64 Kbytes (SAM7X256)
– 32 Kbytes (SAM7X128)
• Memory Controller (MC)
– Embedded Flash Controller, Abort Status and Misalignment Detection
• Reset Controller (RSTC)
– Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout
Detector
– Provides External Reset Signal Shaping and Reset Source Status
• Clock Generator (CKGR)
– Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and one PLL
• Power Management Controller (PMC)
– Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and
Idle Mode
– Four Programmable External Clock Signals
• Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt
Protected
• Debug Unit (DBGU)
– 2-wire UART and Support for Debug Communication Channel interrupt,
Programmable ICE Access Prevention
– Mode for General Purpose 2-wire UART Serial Communication
• Periodic Interval Timer (PIT)
– 20-bit Programmable Counter plus 12-bit Interval Counter
• Windowed Watchdog (WDT)
– 12-bit key-protected Programmable Counter
– Provides Reset or Interrupt Signals to the System
– Counter May Be Stopped While the Processor is in Debug State or in Idle Mode
AT91SAM
ARM-based
Flash MCU
SAM7X512
SAM7X256
SAM7X128
Summary
6120GS–ATARM–07-Apr-11
器件 Datasheet 文档搜索
AiEMA 数据库涵盖高达 72,405,303 个元件的数据手册，每天更新 5,000 多个 PDF 文件
