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AT91SAM7X512-CU 其他数据使用手册 - ATMEL（爱特美尔）
制造商:
ATMEL（爱特美尔）
分类:
微控制器
封装:
TFBGA-100
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P47P152P206P257P282P353P486P572Hot
典型应用电路图在P46P328P364P450
原理图在P4P12P23P24P26P27P45P57P73P79P85P93
封装尺寸在P8P10P630P631P632P671P675
型号编码规则在P634P671P675P678
标记信息在P635P638P647P656P665P677
封装信息在P632
功能描述在P48P58P73P80P86P94P103P142P154P232P258P283
技术参数、封装参数在P677
应用领域在P152
电气规格在P8P10P58P616P618P630P636P641P650P659P665P671
导航目录
AT91SAM7X512-CU数据手册
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若手册格式错乱，请下载阅览PDF原文件
Features
• Incorporates the ARM7TDMI
®
ARM
®
Thumb
®
Processor
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
• Leader in MIPS/Watt
– EmbeddedICE
™
In-circuit Emulation, Debug Communication Channel Support
• Internal High-speed Flash
– 512 Kbytes (SAM7X512) Organized in Two Banks of 1024 Pages of
256 Bytes (Dual Plane)
– 256 Kbytes (SAM7X256) Organized in 1024 Pages of 256 Bytes (Single Plane)
– 128 Kbytes (SAM7X128) Organized in 512 Pages of 256 Bytes (Single Plane)
• Single Cycle Access at Up to 30 MHz in Worst Case Conditions
• Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed
• Page Programming Time: 6 ms, Including Page Auto-erase,
Full Erase Time: 15 ms
• 10,000 Write Cycles, 10-year Data Retention Capability,
Sector Lock Capabilities, Flash Security Bit
• Fast Flash Programming Interface for High Volume Production
• Internal High-speed SRAM, Single-cycle Access at Maximum Speed
– 128 Kbytes (SAM7X512)
– 64 Kbytes (SAM7X256)
– 32 Kbytes (SAM7X128)
• Memory Controller (MC)
– Embedded Flash Controller, Abort Status and Misalignment Detection
• Reset Controller (RSTC)
– Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout
Detector
– Provides External Reset Signal Shaping and Reset Source Status
• Clock Generator (CKGR)
– Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and one PLL
• Power Management Controller (PMC)
– Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and
Idle Mode
– Four Programmable External Clock Signals
• Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt
Protected
• Debug Unit (DBGU)
– 2-wire UART and Support for Debug Communication Channel interrupt,
Programmable ICE Access Prevention
– Mode for General Purpose 2-wire UART Serial Communication
• Periodic Interval Timer (PIT)
– 20-bit Programmable Counter plus 12-bit Interval Counter
• Windowed Watchdog (WDT)
– 12-bit key-protected Programmable Counter
– Provides Reset or Interrupt Signals to the System
– Counter May Be Stopped While the Processor is in Debug State or in Idle Mode
AT91SAM
ARM-based
Flash MCU
SAM7X512
SAM7X256
SAM7X128
6120I–ATARM–06-Apr-11
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