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AT91SAM9261SB-CU 其他数据使用手册 - ATMEL(爱特美尔)
制造商:
ATMEL(爱特美尔)
分类:
微控制器
封装:
LFBGA-217
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
原理图在P4P20P21P22
封装尺寸在P9P36
型号编码规则在P37
导航目录
AT91SAM9261SB-CU数据手册
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2
6242ES–ATARM–11-Sep-09
AT91SAM9261S
• Advanced Interrupt Controller (AIC)
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– Three External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected
• Debug Unit (DBGU)
– 2-wire USART and support for Debug Communication Channel, Programmable ICE Access Prevention
– Mode for General Purpose Two-wire UART Serial Communication
• Periodic Interval Timer (PIT)
– 20-bit Interval Timer plus 12-bit Interval Counter
• Watchdog Timer (WDT)
– Key Protected, Programmable Only Once, Windowed 12-bit Counter, Running at Slow Clock
• Real-Time Timer (RTT)
– 32-bit Free-running Backup Counter Running at Slow Clock
• Three 32-bit Parallel Input/Output Controllers (PIO) PIOA, PIOB and PIOC
– 96 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output
• Nineteen Peripheral DMA (PDC) Channels
• Multimedia Card Interface (MCI)
– SDCard and MultiMediaCard
™
Compliant
– Automatic Protocol Control and Fast Automatic Data Transfers with PDC, MMC and SDCard Compliant
• Three Synchronous Serial Controllers (SSC)
– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
– I²S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
• Three Universal Synchronous/Asynchronous Receiver Transmitters (USART)
– Individual Baud Rate Generator, IrDA
®
Infrared Modulation/Demodulation
– Support for ISO7816 T0/T1 Smart Card, Hardware and Software Handshaking, RS485 Support
• Two Master/Slave Serial Peripheral Interface (SPI)
– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
• One Three-channel 16-bit Timer/Counters (TC)
– Three External Clock Inputs, Two multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
• Two-wire Interface (TWI)
– Master Mode Support, All Two-wire Atmel EEPROMs Supported
• IEEE
®
1149.1 JTAG Boundary Scan on All Digital Pins
• Required Power Supplies:
– 1.08V to 1.32V for VDDCORE and VDDBU
– 3.0V to 3.6V for VDDOSC and for VDDPLL
– 2.7V to 3.6V for VDDIOP (Peripheral I/Os)
– 1.65V to 1.95V and 3.0V to 3.6V for VDDIOM (Memory I/Os)
• Available in a 217-ball LFBGA RoHS-compliant Package
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