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ATMEGA162V-8AU
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3
AVR082
2516D–AVR–01/04
The following I/O Registers have changed names, but include the same functionality
and placement when accessed as in ATmega161:
Improvements to
Timer/Counters
For details about the improved and additional features, please refer to the data sheet.
The following features have been added:
Variable top value in PWM mode.
Timer/Counter0 extended with compare function and PWM.
For Timer/Counter1, Phase and Frequency Correct PWM mode in addition to the
Phase Correct PWM mode.
Updating of OCR in PWM
Mode (Applies to all
Timer/Counters)
In PWM mode, the value written to the Output Compare Register is not physically used
as compare value until the Timer/Counter reaches the value TOP. The interpretation of
this point of time differs between ATmega161 and ATmega162. In ATmega161, the new
OCR value is used in the cycle where the Timer/Counter has the value TOP. In
ATmega162, the counter value TOP is used to update the compare value, i.e., it is first
active in the cycle where the Timer/Counter has the value TOP-1 down-counting.
Improvements to
External Memory
Interface
Refer to the ATmega162 data sheet for details on the changed timing.
Improvements to
UART
The UART in ATmega161 has been replaced by a USART in ATmega162. The
ATmega162 USART is compatible with the ATmega161 UART with one exception: The
two-level Receive Register acts as a FIFO. The FIFO is disabled when the M161C Fuse
is programmed. Still the following must be kept in mind when the M161C Fuse is
programmed:
The UDR must only be read once for each incoming data.
The Error Flags (FE and DOR) and the ninth data bit (RXB8) are buffered with the
data in the receive buffer. Therefore the status bits must always be read before the
UDR Register is read. Otherwise, the error status will be lost.
ATmega161 contains the baud-rate high-bytes for both UARTs in a common register –
UBRRHI. ATmega162 has separate registers for the high-bytes of the two USARTs;
UBRR0H and UBRR1H, implying a modification to the code when porting the design to
ATmega162
Another minor difference is the initial value of RXB8, which is “1” in the UART in
ATmega161 and “0” in the USART in ATmega162.
Table 3. Changed Register Names
Register name
in ATmega161
Register name
in ATmega162 Comments
GIMSK GICR
MCUSR MCUCSR
UBRRHI UBRR0H and
UBRR1H
Shared register split into two registers. See
“Improvements to UART” on page 3.
UBRR0 UBRR0L
UBRR1 UBRR1L

ATMEGA162V-8AU 数据手册

ATMEL(爱特美尔)
324 页 / 3.66 MByte
ATMEL(爱特美尔)
68 页 / 9.77 MByte
ATMEL(爱特美尔)
22 页 / 0.54 MByte
ATMEL(爱特美尔)
8 页 / 0.07 MByte
ATMEL(爱特美尔)
1 页 / 0.13 MByte

ATMEGA162V8 数据手册

ATMEL(爱特美尔)
ATmega 系列 8 MHz 16 KB 闪存 1 KB SRAM 8 位 微控制器 - TQFP-44
ATMEL(爱特美尔)
ATMEL  ATMEGA162V-8PU  微控制器, 8位, 低功率高性能, ATmega, 8 MHz, 16 KB, 1 KB, 40 引脚, DIP
Microchip(微芯)
8 位 megaAVR 微控制器,4KB 到 16KB 闪存我们在 RS Components 提供 Atmel 的各种 megaAVR 8 位微控制器。每个微控制器均基于增强型 RISC 体系结构,并具有 QTouch 库支持。 所有 megaAVR 微控制器具有不同 Kb 的系统内可编程内存、EEPROM 和 SRAM 以及不同引脚和封装类型。 **megaAVR 8 位微控制器类型 ** •ATmega8 •ATmega16 •ATmega48 •ATmega88 •ATmega162 •ATmega164 •ATmega165 •ATmega168 •ATmega8515 •ATmega8535
ATMEL(爱特美尔)
8 位 megaAVR® 微控制器,4KB 至 16KB 闪存,Atmel我们在 RS Components 提供 Atmel 的各种 megaAVR 8 位微控制器。每个微控制器均基于增强型 RISC 体系结构,并具有 QTouch 库支持。 所有 megaAVR 微控制器具有不同 Kb 的系统内可编程内存、EEPROM 和 SRAM 以及不同引脚和封装类型。 **megaAVR 8 位微控制器类型 ** •ATmega8 •ATmega16 •ATmega48 •ATmega88 •ATmega162 •ATmega164 •ATmega165 •ATmega168 •ATmega8515 •ATmega8535### AVR 微控制器,Atmel
Microchip(微芯)
ATmega 系列 8 MHz 16 KB 闪存 1 KB SRAM 8 位 微控制器 - TQFP-44
Microchip(微芯)
8 位 megaAVR 微控制器,4KB 到 16KB 闪存我们在 RS Components 提供 Atmel 的各种 megaAVR 8 位微控制器。每个微控制器均基于增强型 RISC 体系结构,并具有 QTouch 库支持。 所有 megaAVR 微控制器具有不同 Kb 的系统内可编程内存、EEPROM 和 SRAM 以及不同引脚和封装类型。 **megaAVR 8 位微控制器类型 ** •ATmega8 •ATmega16 •ATmega48 •ATmega88 •ATmega162 •ATmega164 •ATmega165 •ATmega168 •ATmega8515 •ATmega8535
Microchip(微芯)
ATMEL(爱特美尔)
Microchip(微芯)
AVR 8MHz 闪存:8K@x16bit RAM:1KB
ATMEL(爱特美尔)
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