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ATMEGA162V-8PI 其他数据使用手册 - ATMEL（爱特美尔）
制造商:
ATMEL（爱特美尔）
分类:
微控制器
封装:
DIP-40
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P2P5P66Hot
原理图在P3P9P64P90P92P93P94P108P113P114P116P118
封装尺寸在P313P314P315
型号编码规则在P312P318
封装信息在P313
应用领域在P32P33P42P48P60P62P219P222P233P234
电气规格在P64P318
导航目录
ATMEGA162V-8PI数据手册
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6
ATmega162/V
2513H–AVR–04/06
Port D (PD7..PD0) Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port D output buffers have symmetrical drive characteristics with both high sink
and source capability. As inputs, Port D pins that are externally pulled low will source
current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
Port D also serves the functions of various special features of the ATmega162 as listed
on page 79.
Port E(PE2..PE0) Port E is an 3-bit bi-directional I/O port with internal pull-up resistors (selected for each
bit). The Port E output buffers have symmetrical drive characteristics with both high sink
and source capability. As inputs, Port E pins that are externally pulled low will source
current if the pull-up resistors are activated. The Port E pins are tri-stated when a reset
condition becomes active, even if the clock is not running.
Port E also serves the functions of various special features of the ATmega162 as listed
on page 82.
RESET
Reset input. A low level on this pin for longer than the minimum pulse length will gener-
ate a Reset, even if the clock is not running. The minimum pulse length is given in Table
18 on page 49. Shorter pulses are not guaranteed to generate a reset.
XTAL1 Input to the Inverting Oscillator amplifier and input to the internal clock operating circuit.
XTAL2 Output from the Inverting Oscillator amplifier.
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