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ATMEGA32L-8PU 其他数据使用手册 - ATMEL（爱特美尔）
制造商:
ATMEL（爱特美尔）
分类:
8位微控制器
封装:
DIP-40
描述:
8 位 megaAVR® 微控制器，32KB 到 256KB 闪存，Atmel我们在 RS Components 提供多款来自 Atmel 的 megaAVR 8 位微控制器。 每个微控制器均基于增强型 RISC 体系结构，并具有 QTouch 库支持。 所有微控制器类型具有不同 Kb 的系统内可编程内存、EEPROM 和 SRAM 以及不同引脚和封装类型。 **megaAVR 8 位微控制器类型** ATmega32 ATmega64 ATmega128 ATmega324 ATmega325 ATmega406 ATmega640 ATmega644 ATmega645 ATmega1280 ATmega1281 ATmega1284 ATmega2560 ATmega2561 ATmega3250 ATmega6450### AVR 微控制器，Atmel
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P2P4P51Hot
原理图在P3P8P49P69P70P71P73P87P92P93P95P97
封装尺寸在P333P334P335
型号编码规则在P332P338
封装信息在P333P339
技术参数、封装参数在P339
应用领域在P36P44P47P244P247P255P256P257
电气规格在P66P338P339
导航目录
ATMEGA32L-8PU数据手册
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5
2503P–AVR–07/10
ATmega32(L)
Port B (PB7..PB0) Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port B output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port B pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port B also serves the functions of various special features of the ATmega32 as listed on page
57.
Port C (PC7..PC0) Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port C output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port C pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port C pins are tri-stated when a reset condition becomes active,
even if the clock is not running. If the JTAG interface is enabled, the pull-up resistors on pins
PC5(TDI), PC3(TMS) and PC2(TCK) will be activated even if a reset occurs.
The TD0 pin is tri-stated unless TAP states that shift out data are entered.
Port C also serves the functions of the JTAG interface and other special features of the
ATmega32 as listed on page 60.
Port D (PD7..PD0) Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port D output buffers have symmetrical drive characteristics with both high sink and source
capability. As inputs, Port D pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port D pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port D also serves the functions of various special features of the ATmega32 as listed on page
62.
RESET
Reset Input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running. The minimum pulse length is given in Table 15 on page
37. Shorter pulses are not guaranteed to generate a reset.
XTAL1 Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
XTAL2 Output from the inverting Oscillator amplifier.
AVCC AVCC is the supply voltage pin for Port A and the A/D Converter. It should be externally con-
nected to V
CC
, even if the ADC is not used. If the ADC is used, it should be connected to V
CC
through a low-pass filter.
AREF AREF is the analog reference pin for the A/D Converter.
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