器件3D模型

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CD74HCT04MG4 其他数据使用手册 - TI（德州仪器）

制造商:

TI（德州仪器）

分类:

逻辑芯片

封装:

SOIC-14

描述:

高速CMOS逻辑六反相器 High-Speed CMOS Logic Hex Inverter

Pictures:

3D模型

符号图

焊盘图

引脚图

产品图

页面导航:

典型应用电路图在P2

封装尺寸在P8P9P11P12

型号编码规则在P1

标记信息在P8P9

封装信息在P8P9P10P11P12

应用领域在P10P17

导航目录

典型应用电路图在P2
封装尺寸在P8 P9 P11 P12
型号编码规则在P1
标记信息在P8 P9
封装信息在P8 P9 P10 P11 P12
应用领域在P10 P17

CD74HCT04MG4数据手册

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Data sheet acquired from Harris Semiconductor

SCHS156C

Features

• Buffered Inputs

• Asynchronous Parallel Load

• Complementary Outputs

• Fanout (Over Temperature Range)

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55

C to 125

• Balanced Propagation Delay and Transition Times

• Signiﬁcant Power Reduction Compared to LSTTL

Logic ICs

• HC Types

- 2V to 6V Operation

- High Noise Immunity: N

= 30%, N

= 30% of V

at V

= 5V

• HCT Types

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

= 0.8V (Max), V

= 2V (Min)

- CMOS Input Compatibility, I

≤ 1µA at V

, V

Pinout

CD54HC165, CD54HCT165

(CERDIP)

CD74HC165, CD74HCT165

(PDIP, SOIC)

TOP VIEW

Description

The ’HC165 and ’HCT165 are 8-bit parallel or serial-in shift

registers with complementary serial outputs (Q

and Q

)

available from the last stage. When the parallel load (

PL)

input is LOW, parallel data from the D0 to D7 inputs are

loaded into the register asynchronously. When the

PL is

HIGH, data enters the register serially at the DS input and

shifts one place to the right (Q

→Q

, etc.) with each

positive-going clock transition. This feature allows parallel-

to-serial converter expansion by typing the Q

output to the

DS input of the succeeding device.

For predictable operation the LOW-to-HIGH transition of

should only take place while CP is HIGH. Also, CP an d

should be LOW before the LOW-to-HIGH transition of PL to

prevent shifting the data when

PL goes HIGH.

GND

Ordering Information

PART NUMBER

TEMP. RANGE

(

C) PACKAGE

CD54HC165F3A -55 to 125 16 Ld CERDIP

CD54HCT165F3A -55 to 125 16 Ld CERDIP

CD74HC165E -55 to 125 16 Ld PDIP

CD74HC165M -55 to 125 16 Ld SOIC

CD74HC165MT -55 to 125 16 Ld SOIC

CD54HC165M96 -55 to 125 16 Ld SOIC

CD74HCT165E -55 to 125 16 Ld PDIP

CD74HCT165M -55 to 125 16 Ld SOIC

CD74HCT165MT -55 to 125 16 Ld SOIC

CD54HCT165M96 -55 to 125 16 Ld SOIC

NOTE: When ordering, use the entire part number. The sufﬁx 96

denotes tape and reel. The sufﬁx T denotes a small-quantity reel of

250.

February 1998 - Revised October 2003

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

CD54HC165, CD74HC165,

CD54HCT165, CD74HCT165

High-Speed CMOS Logic

8-Bit Parallel-In/Serial-Out Shift Register

[

/Title

(

CD74H

165,

D74H

T165)

Subject

(

High

peed

MOS

ogic 8-

it Par-

llel-

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