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DS1307ZN/T&R 其他数据使用手册 - Maxim Integrated（美信）
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实时时钟芯片
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64 ×8 ，串行， I²C实时时钟 64 x 8, Serial, I2C Real-Time Clock
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Maxim > Design Support > Technical Documents > Tutorials > Real-Time Clocks > APP 5413
Keywords: real-time clock, BCD, RTC, binary coded decimal, state machine logic
TUTORIAL 5413
State Machine Logic in Binary-Coded Decimal
(BCD)-Formatted Real-Time Clocks
Sep 17, 2012
Abstract: When developing code to operate a real-time clock (RTC), it is often beneficial to understand
how the clock core operating logic has been defined. This tutorial discusses the counter-chain structure
used in Maxim's binary-coded decimal (BCD)-formatted RTCs. It provides some insight into the expected
chip behavior if improper or illegal contents are somehow installed.
A similar version of this article appears on Electronic Design, July 2012.
Introduction
When developing code to operate a real-time clock (RTC), it is often beneficial to understand how the
clock core operating logic has been defined. We all have a fundamental comprehension of how a clock
and calendar should operate when properly programmed, but this application note also provides some
insight into the expected chip behavior if improper or illegal contents are somehow installed.
A basic real-time clock counter chain found in many of Maxim's binary-coded decimal (BCD)-formatted
RTCs (such as the DS12885 and DS1302) is illustrated in Figure 1.
Figure 1. RTC counter chain structure.
Each counter register has defined minimum and maximum values, and most are preset to their
appropriate minimums on initial power application. As a natural function of timekeeping, when the
Seconds count reaches the maximum value, the next increment causes a carry to the Minutes register
and the Seconds rolls over to the minimum value. A Minutes rollover carries to the Hours; the Hours
rollover carries to both the Date and arbitrary Day-of-Week registers; the Date rollover carries to the
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