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DS34C86TMX/NOPB 其他数据使用手册 - TI（德州仪器）
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TI（德州仪器）
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接口芯片
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SOIC-16
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CMOS差动线路接收器
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DS34C86TMX/NOPB数据手册
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DS34C86T
www.ti.com
SNLS379C –MAY 1998–REVISED APRIL 2013
DS34C86T Quad CMOS Differential Line Receiver
Check for Samples: DS34C86T
1
FEATURES
DESCRIPTION
The DS34C86T is a quad differential line receiver
2
• CMOS Design for Low Power
designed to meet the RS-422, RS-423, and Federal
• ±0.2V Sensitivity Over the Input Common
Standards 1020 and 1030 for balanced and
Mode Voltage Range
unbalanced digital data transmission, while retaining
• Typical Propagation Delays: 19 ns
the low power characteristics of CMOS.
• Typical Input Hysteresis: 60 mV
The DS34C86T has an input sensitivity of 200 mV
over the common mode input voltage range of ±7V.
• Inputs Won't Load Line when V
CC
= 0V
Hysteresis is provided to improve noise margin and
• Meets the Requirements of EIA Standard RS-
discourage output instability for slowly changing input
422
waveforms.
• TRI-STATE Outputs for System Bus
The DS34C86T features internal pull-up and pull-
Compatibility
down resistors which prevent output oscillation on
• Available in Surface Mount
unused channels.
• Open Input Failsafe Feature, Output High for
Separate enable pins allow independent control of
Open Input
receiver pairs. The TRI-STATE outputs have 6 mA
source and sink capability. The DS34C86T is pin
compatible with the DS3486.
Logic Diagram
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 1998–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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