Datasheet 搜索 > 微控制器 > Microchip（微芯） > DSPIC33EP32MC202T-E/SS 数据手册 > DSPIC33EP32MC202T-E/SS 产品手册 4/292 页
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DSPIC33EP32MC202T-E/SS 产品手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
微控制器
封装:
SSOP-28
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P6P7P8Hot
原理图在P12P16P23P59P99P109P135P138P139P143P147P150
封装尺寸在P278
标记信息在P277
封装信息在P4P240P277P278P279P280P281P282P291
功能描述在P205
技术参数、封装参数在P241P245P246P247P248P250P271P272P273
应用领域在P105
电气规格在P246P248
导航目录
DSPIC33EP32MC202T-E/SS数据手册
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若手册格式错乱，请下载阅览PDF原文件
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
DS70283B-page 2 Preliminary © 2007 Microchip Technology Inc.
Motor Control Peripherals:
• 6-channel 16-bit Motor Control PWM:
- 3 duty cycle generators
- Independent or Complementary mode
- Programmable dead time and output polarity
- Edge-aligned or center-aligned
- Manual output override control
- 1 Fault input
- Trigger for ADC conversions
- PWM frequency for 16-bit resolution
(@ 40 MIPS) = 1220 Hz for Edge-Aligned
mode, 610 Hz for Center-Aligned mode
- PWM frequency for 11-bit resolution
(@ 40 MIPS) = 39.1 kHz for Edge-Aligned
mode, 19.55 kHz for Center-Aligned mode
• 2-channel 16-bit Motor Control PWM:
- 1 duty cycle generator
- Independent or Complementary mode
- Programmable dead time and output polarity
- Edge-aligned or center-aligned
- Manual output override control
- 1 Fault input
- Trigger for ADC conversions
- PWM frequency for 16-bit resolution
(@ 40 MIPS) = 1220 Hz for Edge-Aligned
mode, 610 Hz for Center-Aligned mode
- PWM frequency for 11-bit resolution
(@ 40 MIPS) = 39.1 kHz for Edge-Aligned
mode, 19.55 kHz for Center-Aligned mode
• Quadrature Encoder Interface module:
- Phase A, Phase B and index pulse input
- 16-bit up/down position counter
- Count direction status
- Position Measurement (x2 and x4) mode
- Programmable digital noise filters on inputs
- Alternate 16-bit Timer/Counter mode
- Interrupt on position counter rollover/underflow
Analog-to-Digital Converters (ADCs):
• 10-bit, 1.1 Msps or 12-bit, 500 Ksps conversion:
- 2 and 4 simultaneous samples (10-bit ADC)
- Up to 9 input channels with auto-scanning
- Conversion start can be manual or
synchronized with 1 of 4 trigger sources
- Conversion possible in Sleep mode
- ±2 LSb max integral nonlinearity
- ±1 LSb max differential nonlinearity
CMOS Flash Technology:
• Low-power, high-speed Flash technology
• Fully static design
• 3.3V (±10%) operating voltage
• Industrial and Extended temperature
• Low power consumption
Communication Modules:
•4-wire SPI:
- Framing supports I/O interface to simple
codecs
- Supports 8-bit and 16-bit data
- Supports all serial clock formats and
sampling modes
•I
2
C™:
- Full Multi-Master Slave mode support
- 7-bit and 10-bit addressing
- Bus collision detection and arbitration
- Integrated signal conditioning
- Slave address masking
•UART:
- Interrupt on address bit detect
- Interrupt on UART error
- Wake-up on Start bit from Sleep mode
- 4-character TX and RX FIFO buffers
- LIN bus support
-IrDA
®
encoding and decoding in hardware
- High-Speed Baud mode
- Hardware Flow Control with CTS and RTS
Packaging:
• 28-pin SDIP/SOIC/QFN-S
• 44-pin QFN/TQFP
Note: See the device variant tables for exact
peripheral features per device.
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