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DTC143EET1G
器件3D模型
0.151
导航目录
  • 封装尺寸在P1
  • 焊盘布局在P1P2
  • 标记信息在P1
DTC143EET1G数据手册
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of 2 Go
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© Semiconductor Components Industries, LLC, 2000
February, 2000 − Rev. 01B
1 Case Outline Number:
463
SC−75/SOT−416
CASE 463−01
ISSUE G
DATE 07 AUG 2015
SCALE 4:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
M
0.20 (0.008) D
−E−
−D−
b
e
3 PL
0.20 (0.008) E
C
L
A
A1
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
STYLE 2:
PIN 1. ANODE
2. N/C
3. CATHODE
3
2
1
STYLE 3:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. ANODE
XX M
G
XX = Specific Device Code
M = Date Code
G = Pb−Free Package
1
STYLE 5:
PIN 1. GATE
2. SOURCE
3. DRAIN
H
E
DIM MIN NOM MAX
MILLIMETERS
A 0.70 0.80 0.90
A1 0.00 0.05 0.10
b
C 0.10 0.15 0.25
D 1.55 1.60 1.65
E
e 1.00 BSC
0.027 0.031 0.035
0.000 0.002 0.004
0.004 0.006 0.010
0.061 0.063 0.065
0.04 BSC
MIN NOM MAX
INCHES
0.15 0.20 0.30 0.006 0.008 0.012
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
GENERIC
MARKING DIAGRAM*
H
E
L 0.10 0.15 0.20
1.50 1.60 1.70
0.004 0.006 0.008
0.060 0.063 0.067
0.70 0.80 0.90 0.027 0.031 0.035
0.787
0.031
0.508
0.020
1.000
0.039
ǒ
mm
inches
Ǔ
SCALE 10:1
0.356
0.014
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
1
2
3
1.803
0.071
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
http://onsemi.com
1
© Semiconductor Components Industries, LLC, 2002
October, 2002 − Rev. 0
Case Outline Number:
XXX
DOCUMENT NUMBER:
STATUS:
NEW STANDARD:
DESCRIPTION:
98ASB15184C
ON SEMICONDUCTOR STANDARD
SC−75/SOT−416
Electronic versions are uncontrolled except when
accessed directly from the Document Repository. Printed
versions are uncontrolled except when stamped
“CONTROLLED COPY” in red.
PAGE 1 OF 2

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