Datasheet 搜索 > 微控制器 > Silicon Labs(芯科) > EFM32TG840F32-QFN64 数据手册 > EFM32TG840F32-QFN64 其他数据使用手册 3/16 页


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EFM32TG840F32-QFN64 其他数据使用手册 - Silicon Labs(芯科)
制造商:
Silicon Labs(芯科)
分类:
微控制器
封装:
QFN-64
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
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原理图在P5P7
封装尺寸在P13
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EFM32TG840F32-QFN64数据手册
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ELECTROSTATIC WARNING
The EFM32G880F128-STK board is shipped in protective anti-static packaging. The
board must not be subject to high electrostatic potentials. General practice for
working with static sensitive devices should be applied when working with this
board.
BOARD USE REQUIREMENTS
Cables: The cable you will need depends on the programmer/debugger you use. If
you use ARM-JTAG-EW, you will need 1.8 m A-B USB cable.
Hardware: Programmer/Debugger – Olimex ARM Programmer: ARM-JTAG-EW.
Software: ARM C compiler and JTAG programmer.
PROCESSOR FEATURES
EFM32G880F128-STK board use High Performance ARM-based 32-bit
microcontroller EFM32G880F128 with these features:
– Memory Protection Unit
– Wake-up Interrupt Controller
– Flexible Energy Management System
– 20 nA @ 3 V Shutoff Mode
– 0.6 µA @ 3 V Stop Mode, including Power-on Reset, Brown-out Detector,
RAM and CPU retention
– 0.9 µA @ 3 V Deep Sleep Mode, including Real Time Clock with 32.768 kHz
oscillator, Power-on Reset, Brown-out Detector, RAM and CPU retention
– 45 µA/MHz @ 3 V Sleep Mode
– 180 µA/MHz @ 3 V Run Mode, with code executed from flash
– 128 KB Flash
– 16 KB RAM
– 85 General Purpose I/O pins
– Configurable Push-pull, Open-drain, pull-up/down, input filter, drive
strength
– Configurable peripheral I/O locations
– 16 asynchronous external interrupts
– 8 Channel DMA Controller
– 8 Channel Peripheral Reflex System for autonomous inter-peripheral signaling
– External Bus Interface for up to 64 MB of external memory mapped space
– Hardware AES with 128/256-bit keys in 54/75 cycles
– Timers/Counters
– 3× 16-bit Timer/Counter
– 3×3 Compare/Capture/PWM channels
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