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EP2C8Q208C7N 其他数据使用手册 - Altera(阿尔特拉)
制造商:
Altera(阿尔特拉)
分类:
FPGA芯片
封装:
PQFP-208
描述:
FPGA - 现场可编程门阵列 FPGA - Cyclone II 516 LABs 138 IOs
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P18P19Hot
原理图在P16P33P43P48P53P57P61P63P109P111P127P148
封装尺寸在P21
型号编码规则在P17
技术参数、封装参数在P21P23P28P29P30P31P109
电气规格在P23P24P25P26P27P28P29P30P31P52P55P57
导航目录
EP2C8Q208C7N数据手册
Page:
of 220 Go
若手册格式错乱,请下载阅览PDF原文件

Mixed-Signal Byte-Programmable EPROM MCU
C8051T630/1/2/3/4/5
Rev. 1.1 8/17 Copyright © 2017 by Silicon Laboratories C8051T630/1/2/3/4/5
Analog Peripherals
-
10-Bit ADC (‘T630/2/4 only)
• Up to 500 ksps
• Up to 16 external inputs
• VREF from on-chip VREF, external pin,
Internal Regulator or V
DD
• Internal or external start of conversion source
• Built-in temperature sensor
- 10-Bit Current Output DAC (‘T630/2/4 only)
- Comparator
• Programmable hysteresis and response time
• Configurable as interrupt or reset source
• Low current (<0.5 µA)
On-Chip Debug
-
C8051F336 can be used as code development
platform; Complete development kit available
- On-chip debug circuitry facilitates full speed,
non-intrusive in-system debug
- Provides breakpoints, single stepping,
inspect/modify memory and registers
Supply Voltage 1.8 to 3.6 V
-
On-chip LDO for internal core supply
- Built-in voltage supply monitor
Temperature Range: –40 to +85 °C
High-Speed 8051 µC Core
-
Pipelined instruction architecture; executes 70% of
instructions in 1 or 2 system clocks
- Up to 25 MIPS throughput with 25 MHz clock
Expanded interrupt handler
Memory
-
768 Bytes internal data RAM (256 + 512)
- 8, 4, or 2 kB byte-programmable EPROM code
memory
Digital Peripherals
-
17 Port I/O with high sink current capability
- Hardware enhanced UART, SMBus™, and
enhanced SPI™ serial ports
- Four general purpose 16-bit counter/timers
• Timer 3 supports real-time clock using external clock
source
- 16-Bit programmable counter array (PCA) with three
capture/compare modules and enhanced PWM
functionality
Clock Sources
-
Two internal oscillators:
• 24.5 MHz with ±2% accuracy supports crystal-less
UAR
T operation and low-power suspend mode with
fast wake time
• 80/40/20/10 kHz low frequency, low power operation
- External oscillator: RC, C, or CMOS Clock
- Can switch between clock sources on-the-fly; useful
in power saving modes
20-Pin QFN Package (4x4 mm)
ANALOG
PERIPHERALS
2/4/8 kB
EPROM
768 B SRAM
POR
DEBUG
CIRCUITRY
FLEXIBLE
INTERRUPTS
8051 CPU
(25 MIPS)
DIGITAL I/O
24.5 MHz PRECISION
INTERNAL OSCILLATOR
HIGH-SPEED CONTROLLER CORE
CROSSBAR
VOLTAGE
COMPARATOR
+
-
WDT
UART
SMBus
PCA
Timer 0
Timer 1
Timer 2
Timer 3
Port 0
SPI
LOW FREQUENCY INTERNAL
OSCILLATOR
Port 1
P2.0
‘T630/2/4 Only
10-bit
500 ksps
ADC
TEMP
SENSOR
A
M
U
X
10-bit
Current
DAC
VREF
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