Datasheet 搜索 > Flash芯片 > Micron（镁光） > JS28F256P33TFE 数据手册 > JS28F256P33TFE 其他数据使用手册 1/91 页
器件3D模型￥ 21.446
JS28F256P33TFE 其他数据使用手册 - Micron（镁光）
制造商:
Micron（镁光）
分类:
Flash芯片
封装:
TSOP-56
描述:
NOR闪存 JS28F256P33TFE TSOP-56
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
原理图在P9
封装尺寸在P11P12
型号编码规则在P2P28
封装信息在P1P3
功能描述在P8
技术参数、封装参数在P70P71P75P76P77P78P79P80P81P82P83P84
电气规格在P75P76
型号编号列表在P2P3
导航目录
JS28F256P33TFE数据手册
Page:
of 91 Go
若手册格式错乱，请下载阅览PDF原文件
Micron Parallel NOR Flash Embedded
Memory (P33-65nm)
RC28F256P33TFE, RC28F256P33BFE, RC28F256P33BFF,
PC28F256P33TFE, PC28F256P33BFE, PC28F256P33BFF,
PC28F256P33BFR, RC48F4400P0TB0EJ, PC48F4400P0TB0EE,
PC48F4400P0TB0EH, JS28F256P33TFE, JS28F256P33BFE
Features
• High performance
– 95ns initial access for Easy BGA
– 105ns initial access for TSOP
– 25ns 16-word asychronous page read mode
– 52 MHz (Easy BGA) with zero WAIT states and
17ns clock-to-data output synchronous burst
read mode
– 4-, 8-, 16-, and continuous word options for burst
mode
– Buffered enhanced factory programming (BEFP)
at 2 MB/s (TYP) using a 512-word buffer
– 3.0V buffered programming at 1.14 MB/s (TYP)
using a 512-word buffer
• Architecture
– MLC: highest density at lowest cost
– Asymmetrically blocked architecture
– Four 32KB parameter blocks: top or bottom con-
figuration
– 128KB main blocks
– Blank check to verify an erased block
• Voltage and power
– V
CC
(core) voltage: 2.3V to 3.6V
– V
CCQ
(I/O) voltage: 2.3V to 3.6V
– Standy current: 65µA (TYP) for 256Mb
– 52 MHz continuous synchronous read current:
21mA (TYP), 24mA (MAX)
• Security
– One-time programmable register: 64 OTP bits,
programmed with unique information from Mi-
cron; 2112 OTP bits available for customer pro-
gramming
– Absolute write protection: V
PP
= V
SS
– Power-transition erase/program lockout
– Individual zero-latency block locking
– Individual block lock-down
– Password access
• Software
– 25μs (TYP) program suspend
– 25μs (TYP) erase suspend
– Flash Data Integrator optimized
– Basic command set and extended function Inter-
face (EFI) command set compatible
– Common flash interface
• Density and Packaging
– 56-lead TSOP package (256Mb only)
– 64-ball Easy BGA package (256Mb, 512Mb)
– QUAD+ and SCSP packages (256Mb, 512Mb)
– 16-bit wide data bus
• Quality and reliabilty
– JESD47 compliant
– Operating temperature: –40°C to +85°C
– Minimum 100,000 ERASE cycles per block
– 65nm process technology
256Mb and 512Mb (256Mb/256Mb),
P33-65nm
Features
PDF: 09005aef845667ad
p33_65nm_MLC_256Mb-512mb.pdf - Rev. C 9/15 EN
1
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2013 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.
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