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LPC2103FBD48-S 其他数据使用手册 - NXP（恩智浦）
制造商:
NXP（恩智浦）
分类:
32位控制器
封装:
LQFP
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LPC2103FBD48-S数据手册
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1. General description
The LPC2101/02/03 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S CPU with
real-time emulation that combines the microcontroller with 8 kB, 16 kB or 32 kB of
embedded high-speed flash memory. A 128-bit wide memory interface and a unique
accelerator architecture enable 32-bit code execution at the maximum clock rate. For
critical performance in interrupt service routines and DSP algorithms, this increases
performance up to 30 % over Thumb mode. For critical code size applications, the
alternative 16-bit Thumb mode reduces code by more than 30 % with minimal
performance penalty.
Due to their tiny size and low power consumption, the LPC2101/02/03 are ideal for
applications where miniaturization is a key requirement. A blend of serial communications
interfaces ranging from multiple UARTs, SPI to SSP and two I
2
C-buses, combined with
on-chip SRAM of 2 kB/4 kB/8 kB, make these devices very well suited for communication
gateways and protocol converters. The superior performance also makes these devices
suitable for use as math coprocessors. Various 32-bit and 16-bit timers, an improved
10-bit ADC, PWM features through output match on all timers, and 32 fast GPIO lines with
up to nine edge or level sensitive external interrupt pins make these microcontrollers
particularly suitable for industrial control and medical systems.
2. Features
2.1 Enhanced features
Enhanced features are available in parts LPC2101/02/03 labelled Revision A and higher:
n Deep power-down mode with option to retain SRAM memory and/or RTC.
n Three levels of flash Code Read Protection (CRP) implemented.
2.2 Key features
n 16-bit/32-bit ARM7TDMI-S microcontroller in tiny LQFP48 and HVQFN48 packages.
n 2 kB/4 kB/8 kB of on-chip static RAM and 8 kB/16 kB/32 kB of on-chip flash program
memory. 128-bit wide interface/accelerator enables high-speed 70 MHz operation.
n ISP/IAP via on-chip bootloader software. Single flash sector or full chip erase in
100 ms and programming of 256 bytes in 1 ms.
n EmbeddedICE-RT offers real-time debugging with the on-chip RealMonitor software.
n The 10-bit ADC provides eight analog inputs, with conversion times as low as 2.44 µs
per channel and dedicated result registers to minimize interrupt overhead.
n Two 32-bit timers/external event counters with combined seven capture and seven
compare channels.
LPC2101/02/03
Single-chip 16-bit/32-bit microcontrollers; 8 kB/16 kB/32 kB
flash with ISP/IAP, fast ports and 10-bit ADC
Rev. 04 — 2 June 2009 Product data sheet
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