Web Analytics
Datasheet 搜索 > NXP(恩智浦) > LPC2124FBD64/00,15 数据手册 > LPC2124FBD64/00,15 其他数据使用手册 1/42 页
LPC2124FBD64/00,15
器件3D模型
0
导航目录
  • 引脚图在P5P6P7P8P9
  • 原理图在P4
  • 封装尺寸在P37
  • 型号编码规则在P2
  • 功能描述在P1P10
  • 技术参数、封装参数在P40
  • 应用领域在P40
LPC2124FBD64/00,15数据手册
Page:
of 42 Go
若手册格式错乱,请下载阅览PDF原文件
1. General description
The LPC2114/2124 are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation
and embedded trace support, together with 128/256 kB of embedded high-speed flash
memory. A 128-bit wide memory interface and a unique accelerator architecture enable
32-bit code execution at maximum clock rate. For critical code size applications, the
alternative 16-bit Thumb mode reduces code by more than 30 % with minimal
performance penalty.
With their compact 64-pin package, low power consumption, various 32-bit timers,
4-channel 10-bit ADC, PWM channels and 46 fast GPIO lines with up to nine external
interrupt pins these microcontrollers are particularly suitable for industrial control, medical
systems, access control and point-of-sale. With a wide range of serial communications
interfaces, they are also very well suited for communication gateways, protocol converters
and embedded soft modems as well as many other general-purpose applications.
Remark: Throughout the data sheet, the term LPC2114/2124 will apply to devices with
and without the /00 or /01 suffixes. The /00 or the /01 suffix will be used to differentiate
from other devices only when necessary.
2. Features and benefits
2.1 Key features brought by LPC2114/2124/01 devices
Fast GPIO ports enable port pin toggling up to 3.5 times faster than the original device.
They also allow for a port pin to be read at any time regardless of its function.
Dedicated result registers for ADC(s) reduce interrupt overhead. The ADC pads are
5 V tolerant when configured for digital I/O function(s).
UART0/1 include fractional baud rate generator, auto-bauding capabilities and
handshake flow-control fully implemented in hardware.
Buffered SSP serial controller supporting SPI, 4-wire SSI, and Microwire formats.
SPI programmable data length and master mode enhancement.
Diversified Code Read Protection (CRP) enables different security levels to be
implemented. This feature is available in LPC2114/2124/00 devices as well.
General purpose timers can operate as external event counters.
2.2 Key features common for all devices
16/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package.
16 kB on-chip static RAM.
LPC2114/2124
Single-chip 16/32-bit microcontrollers; 128/256 kB ISP/IAP
flash with 10-bit ADC
Rev. 7 — 10 June 2011 Product data sheet

LPC2124FBD64/00,15 数据手册

NXP(恩智浦)
22 页 / 0.22 MByte
NXP(恩智浦)
385 页 / 1.64 MByte
NXP(恩智浦)
42 页 / 0.28 MByte
NXP(恩智浦)
24 页 / 0.6 MByte

LPC2124 数据手册

Philips(飞利浦)
NXP(恩智浦)
单芯片16位/ 32位微控制器; 128/256 KB ISP / IAP闪存与10位ADC Single-chip 16/32-bit microcontrollers; 128/256 kB ISP/IAP flash with 10-bit ADC
NXP(恩智浦)
单芯片16位/ 32位微控制器; 128/256 KB ISP / IAP闪存与10位ADC Single-chip 16/32-bit microcontrollers; 128/256 kB ISP/IAP flash with 10-bit ADC
NXP(恩智浦)
ARM7 系列微控制器,NXP一系列 NXP 微控制器,基于 16/32 位 ARM7TDMI-S CPU ,带实时仿真和嵌入式追踪支持,将微控制器与 32 kB、64 kB、128 kB、256 kB 和 512 KB 嵌入式高速闪存相结合。 128 位宽存储器接口和独特的加速器体系结构实现在最大时钟频率时使用 32 位代码。高集成和低功耗 一系列串行通信接口和片上 SRAM 选项 备选 16 位 Thumb 模式将代码缩小 30%,而性能削弱最少。 32 位计时器,PWM 通道和多达 47 条 GPIO 线路 适用于工业控制和医疗系统 ### ARM7/9 微控制器,NXP
NXP(恩智浦)
单芯片16位/ 32位微控制器; 128/256 KB ISP / IAP闪存与10位ADC Single-chip 16/32-bit microcontrollers; 128/256 kB ISP/IAP flash with 10-bit ADC
NXP(恩智浦)
LPC2114/2124 - 单芯片16/32位微控制器;128/256 kB ISP/IAP闪存,带10位ADC
Philips(飞利浦)
NXP(恩智浦)
LPC2114/2124 - 单芯片16/32位微控制器;128/256 kB ISP/IAP闪存,带10位ADC
NXP(恩智浦)
ARM微控制器 - MCU
NXP(恩智浦)
ARM微控制器 - MCU
器件 Datasheet 文档搜索
器件加载中...
AiEMA 数据库涵盖高达 72,405,303 个元件的数据手册,每天更新 5,000 多个 PDF 文件