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MC14584BDR2 其他数据使用手册 - ON Semiconductor(安森美)
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逻辑芯片
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SOIC-14
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六角施密特触发器 Hex Schmitt Trigger
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MC14584BDR2数据手册
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Issue Date: 02-Dec-2008 Rev.07-31-07 Page 1 of 13
INITIAL PRODUCT/PROCESS CHANGE NOTIFICATION
Generic Copy
02-Dec-2008
SUBJECT: ON Semiconductor Initial Product/Process Change Notification #16177
TITLE: Initial Notification for Transfer of Standard Logic Metal Gate Integrated Circuits Die
Manufacturing From ON Semiconductor Piestany (Slovakia) To ON Semiconductor Roznov (Czeck
Republic).
PROPOSED FIRST SHIP DATE: 02-Apr-2009
AFFECTED CHANGE CATEGORY: ON Semiconductor Fab Site
AFFECTED PRODUCT DIVISION: Standard Logic Products
FOR ANY QUESTIONS CONCERNING THIS NOTIFICATION:
Contact your local ON Semiconductor Sales Office or Won Kang <Won.Kang@onsemi.com
>
NOTIFICATION TYPE:
Initial Product/Process Change Notification (IPCN)
First change notification sent to customers. IPCNs are issued at least 120 days prior to implementation
of the change. An IPCN is advance notification about an upcoming change and contains general
information regarding the change details and devices affected. It also contains the preliminary
reliability qualification plan.
The completed qualification and characterization data will be included in the Final Product/Process
Change Notification (FPCN).
This IPCN notification will be followed by a Final Product/Process Change Notification (FPCN) at
least 90 days prior to implementation of the change.
DESCRIPTION AND PURPOSE:
May 14, 2008 - ON Semiconductor (Nasdaq: ONNN), has announced plans to close its two
wafer manufacturing facilities located in Piestany, Slovakia, and transfer the production lines
to other company-owned facilities. The targeted close date is Q4 2009.
Description of the change:
The transfer and qualification of the Metal Gate CMOS process and the associated integrated
circuits from the ON Semiconductor Piestany facility (Slovakia) to the Roznov CZ4 wafer
fabrication site located in the Czeck Republic.
The Roznov CZ4 site is certified according to ISO/TS16949 standard.
The Metal Gate process is a CMOS technology being replicated at Roznov CZ4 to get the
same electrical and reliability performances as the Piestany wafer fab.
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