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MC56F8013VFAER2
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MC56F8013VFAER2数据手册
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MC56F8014E
Rev. 3, 08/2007
56F8014
Freescale Semiconductor
©Freescale Semiconductor, Inc. 2003, 2005, 2007. All rights reserved.
Preliminary Chip Errata
56F8014 Digital Signal Controller
Errata numbers are in the form n.m, where n is the number of the errata item and m identifies the document revision
number.
Note: Differences between Chip Revisions are listed on page 5 and errata information for chip revisions prior to
revision A1 have been archived and can be requested from Freescale Sales.
Chip Errata Information:
The following errata items apply to 56F8014 devices with revisions and/or date codes as specified in the “Affected
Chips” column. The date codes are located on the bottom line of the marking.
Errata
Number
Affected Chips Description Impact and Work Around
1.0 Revision A1
(date code 0535
or greater)
Software breakpoint in
uninterruptable code can cause the
debugger to execute instructions
in the wrong order.
Impact:
If a sequence of code includes a conditional branch (i.e. Bcc)
followed by two single word instructions and a breakpoint is set
on the first single word instruction, the incorrect code execution
will occur when the conditional branch is not taken
Workaround:
CodeWarrior has implemented a work around that inserts a NOP
after all conditional branches. The breakpoint will be located in
the second single word instruction after the NOP, so execution
will be correct. This workaround can be enabled or disabled by
the user. Disabling the workaround will generate smaller code.
2.0 Revision A1
(date code 0535
or greater)
I
2
C fails to meet data hold spec
under various frequency/divider
configurations
Impact:
Same as description
Workaround:
User must use only supported configurations per spec.
Table 4-5 of the 56F8000 Peripheral Reference Manual has been
updated to include a list of supported configurations which do
satisfy hold requirements. No hardware changes are planned.

MC56F8013VFAER2 数据手册

NXP(恩智浦)
2 页 / 0.11 MByte
NXP(恩智浦)
62 页 / 2 MByte
NXP(恩智浦)
12 页 / 0.23 MByte
NXP(恩智浦)
332 页 / 4.85 MByte
NXP(恩智浦)
126 页 / 2.19 MByte
NXP(恩智浦)
8 页 / 0.09 MByte

MC56F8013 数据手册

Freescale(飞思卡尔)
NXP(恩智浦)
NXP  MC56F8013VFAE  芯片, 16位混合信号控制器
Freescale(飞思卡尔)
56F8000 数字信号处理器16 位 56F8xxx 系列经过优化,可用于数字功率转换、电动机控制及许多其他需要高速和高分辨率控制回路能力的应用。 56F8xxx 系列将数字信号处理器 (DSP) 的处理能力和微控制器 (MCU) 的功能与一套灵活的外设组合在起,可创建经济型解决方案。 ### 数字信号处理器,Freescale
NXP(恩智浦)
其他系列 32MHz 闪存:8K@x16bit
Freescale(飞思卡尔)
NXP(恩智浦)
其他系列 32MHz 闪存:8K@x16bit
Freescale(飞思卡尔)
数字信号处理器和控制器 - DSP, DSC 16Bit DSPHC ANGUILLA
Freescale(飞思卡尔)
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