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Freescale Semiconductor
Application Note
AN1965
Rev. 1, 07/2005
© Freescale Semiconductor, Inc., 2004, 2005. All rights reserved.
Design of Indirect Power
Factor Correction Using
56F800/E
Design of a Motor Control Application Based on
Processor Expert
1. Introduction
This document describes the design of an Indirect Power Factor
Correction (PFC) application. It is based on Freescale’s
56F800/E controllers, which are ideal for motor control
applications.
Most practical electronic power supplies consist of a
conventional, single-phase, full-bridge rectifier and filter stages.
Already well-established, this type of circuit draws high current
levels from the power line, producing a high level of harmonics.
This harmonic distortion and low Power Factor (PF) reduces the
maximum power available from power lines, thereby decreasing
the efficiency of the electrical power grid. The European
Normative, EN 61000-3-2, defines the limits of the input
current’s harmonic content for power line-supplied equipment.
To meet these requirements, new designs must use an active PFC
at the input. The PFC emulates the ideal ohmic load through
electronically controlled input current drawn from the line.
There are many specific Integrated Circuits (ICs) available to
perform a PFC task. However, additional electronic components
are required, increasing the system’s cost and complexity.
Alternatively, a digital signal controller, which manages the main
control tasks such as motor control, can also implement PFC
control. Using a digital PFC replaces a number of ICs, reducing
system cost. Another benefit of the software implementation is
the ability for easy modification without changing the hardware.
The indirect PFC design featured in this application note satisfies
the minimum requirements for controller performance. The
design is suitable for applications with a the high CPU load and
limited available resources.
Contents
1. Introduction ......................................... 1
2. Freescale Controller Advantages and
Features ......................................... 2
3. Power Factor Correction (PFC)
Theory ........................................... 3
4. System Design Concept ...................... 6
5. Hardware Implementation .................. 8
5.1 System Outline................................8
5.2 High Voltage Hardware Set ............ 9
6. Software Design ................................10
6.1 Calculating Reference Voltage .....10
6.2 Milestone Generation.................... 11
6.3 State Diagram................................ 12
7. Software Implementation .................. 13
7.1 Embedded Beans........................... 13
7.2 Bean Modules ............................... 13
7.3 PFC Control Integration................ 16
7.4 PFC Control Constants ................. 16
7.5 PFC Control API........................... 17
8. PC Master Software .......................... 18
9. References .........................................19

MC56F8025VLD 数据手册

NXP(恩智浦)
161 页 / 2.1 MByte
NXP(恩智浦)
745 页 / 8.95 MByte
NXP(恩智浦)
12 页 / 0.23 MByte
NXP(恩智浦)
20 页 / 0.69 MByte
NXP(恩智浦)
180 页 / 1.78 MByte

MC56F8025 数据手册

Freescale(飞思卡尔)
Freescale(飞思卡尔)
NXP(恩智浦)
NXP  MC56F8025VLD  芯片, 数字信号控制器(DSC), 16位, 32K闪存
NXP(恩智浦)
其他系列 32MHz 16K@x16bit
Freescale(飞思卡尔)
NXP(恩智浦)
Freescale(飞思卡尔)
数字信号处理器和控制器 - DSP, DSC 16 BIT DSPHC
Freescale(飞思卡尔)
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