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MC74HC4040ADR2 其他数据使用手册 - ON Semiconductor（安森美）
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ON Semiconductor（安森美）
分类:
逻辑控制器
封装:
SOIC-16
描述:
12级二进制纹波计数器 12-Stage Binary Ripple Counter
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封装尺寸在P13P14
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标记信息在P1P14
封装信息在P2
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MC74HC4040ADR2数据手册
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若手册格式错乱，请下载阅览PDF原文件
© Semiconductor Components Industries, LLC, 2014
August, 2014 − Rev. 15
1 Publication Order Number:
MC74HC4538A/D
MC74HC4538A
Dual Precision Monostable
Multivibrator (Retriggerable,
Resettable)
The MC74HC4538A is identical in pinout to the MC14538B.
The device inputs are compatible with standard CMOS outputs; with
pullup resistors, they are compatible with LSTTL outputs.
This dual monostable multivibrator may be triggered by either the
positive or the negative edge of an input pulse, and produces
a precision output pulse over a wide range of pulse widths. Because
the device has conditioned trigger inputs, there are no trigger−input
rise and fall time restrictions. The output pulse width is determined by
the external timing components, R
x
and C
x
. The device has a reset
function which forces the Q output low and the Q
output high,
regardless of the state of the output pulse circuitry.
Features
• Unlimited Rise and Fall Times Allowed on the Trigger Inputs
• Output Pulse is Independent of the Trigger Pulse Width
• ± 10% Guaranteed Pulse Width Variation from Part to Part
(Using the Same Test Jig)
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 3.0 to 6.0 V
• Low Input Current: 1.0 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7 A
• Chip Complexity: 145 FETs or 36 Equivalent Gates
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free and are RoHS Compliant
http://onsemi.com
MARKING DIAGRAMS
SOIC−16
D SUFFIX
CASE 751B
TSSOP−16
DT SUFFIX
CASE 948F
1
16
HC4538AG
AWLYWW
HC45
38A
ALYWG
G
1
16
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
A = Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
SOIC−16
TSSOP−16
PIN ASSIGNMENT
13
14
15
16
9
10
11
125
4
3
2
1
8
7
6
A2
RESET 2
C
X
2/R
X
2
GND
V
CC
Q2
Q2
B2
A1
RESET 1
C
X
1/R
X
1
GND
GND
Q1
Q1
B1
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