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MCP2562FDT-H/SN
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MCP2562FDT-H/SN数据手册
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2014 Microchip Technology Inc. DS20005284A-page 1
MCP2561/2FD
Features:
Optimized for CAN FD (Flexible Data rate) at 2, 5
and 8 Mbps Operation
- Maximum Propagation Delay: 120 ns
- Loop Delay Symmetry: -10%/+10% (2 Mbps)
Implements ISO-11898-2 and ISO-11898-5
S
tandard Physical Layer Requirements
Very Low Standby Current (5 µA, typical)
•V
IO Supply Pin to Interface Directly to
CAN Controllers and Microcontrollers with
1.8V to 5.5V I/O
SPLIT Output Pin to Stabilize Common Mode in
Bi
ased Split Termination Schemes
CAN Bus Pins are Disconnected when Device is
Unpowered
- An Unpowered Node or Brown-Out Event will
N
ot Load the CAN Bus
Detection of Ground Fault:
- Permanent Dominant Detection on T
XD
- Permanent Dominant Detection on Bus
Power-on Reset and Voltage Brown-Out
P
rotection on V
DD Pin
Protection Against Damage Due to Short-Circuit
C
onditions (Positive or Negative Battery Voltage)
Protection Against High-Voltage Transients in
Au
tomotive Environments
Automatic Thermal Shutdown Protection
Suitable for 12V and 24V Systems
Meets or exceeds stringent automotive design
re
quirements including “Hardware Requirements
for LIN, CAN and FlexRay Interfaces in
Automotive Applications”, Version 1.3, May 2012
- Radiated emissions @ 2 Mbps with Common
Mode Choke (CMC)
-DPI @ 2 Mbps with CMC
High ESD Protection on CANH and CANL,
me
eting IEC61000-4-2 up to ±14 kV
Available in PDIP-8L, SOIC-8L and 3x3 DFN-8L
Temperature ranges:
- Extended (E): -40°C to +125°C
- High (H): -40°C to +150°C
Description:
The MCP2561/2FD is a second generation high-speed
CAN transceiver from Microchip Technology Inc. It
offers the same features as the MCP2561/2.
Additionally, it guarantees Loop Delay Symmetry in
order to support the higher data rates required for CAN
FD. The maximum propagation delay was improved to
support longer bus length.
The device meets the automotive requirements for
C
AN FD bit rates exceeding 2 Mbps, low quiescent
current, electromagnetic compatibility (EMC) and
electrostatic discharge (ESD).
Package Types
MCP2561/2FD Family Members
MCP2562FD
PDIP, SOIC
VDD
VSS
RXD
CANH
CANL
1
2
3
4
8
7
6
5
VIO
STBYTXD
MCP2561FD
PDIP, SOIC
VDD
VSS
RXD
CANH
CANL
1
2
3
4
8
7
6
5
SPLIT
STBYT
XD
MCP2561FD
3x3 DFN*
VDD
VSS
RXD
CANH
CANL
1
2
3
4
8
7
6
5
SPLIT
STBYT
XD
EP
9
MCP2562FD
3x3 DFN*
VDD
VSS
RXD
CANH
CANL
1
2
3
4
8
7
6
5
VIO
STBYTXD
EP
9
* Includes Exposed Thermal Pad (EP); see Table 1-2
Device Feature Description
MCP2561FD SPLIT pin Common mode stabilization
MCP2562FD V
IO pin Internal level shifter on digital I/O pins
Note: For ordering information, see the “Product Identification System” section on page 29.
High-Speed CAN Flexible Data Rate Transceiver

MCP2562FDT-H/SN 数据手册

Microchip(微芯)
32 页 / 1.25 MByte
Microchip(微芯)
33 页 / 0.8 MByte
Microchip(微芯)
2 页 / 0.1 MByte

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