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MPC8360VVAGDGA 产品描述及参数 - Freescale（飞思卡尔）
制造商:
Freescale（飞思卡尔）
分类:
微处理器
封装:
TBGA-740
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
原理图在P2P3
封装尺寸在P63P64
型号编码规则在P10P99
技术参数、封装参数在P2P3P4P5P6P7P8P9P10P11P12P13
电气规格在P7P8P9P10P15P16P17P19P20P21P22P23
型号编号列表在P83P99
导航目录
MPC8360VVAGDGA数据手册
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若手册格式错乱，请下载阅览PDF原文件
MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 5
Freescale Semiconductor 3
This figure shows the MPC8358E block diagram.
Figure 2. MPC8358E Block Diagram
Major features of the MPC8360E/58E are as follows:
• e300 PowerPC processor core (enhanced version of the MPC603e core)
— Operates at up to 667 MHz (for the MPC8360E) and 400 MHz (for the MPC8358E)
— High-performance, superscalar processor core
— Floating-point, integer, load/store, system register, and branch processing units
— 32-Kbyte instruction cache, 32-Kbyte data cache
— Lockable portion of L1 cache
— Dynamic power management
— Software-compatible with the Freescale processor families implementing the Power Architecture™ technology
• QUICC Engine unit
— Two 32-bit RISC controllers for flexible support of the communications peripherals, each operating up to
500 MHz (for the MPC8360E) and 400 MHz (for the MPC8358E)
— Serial DMA channel for receive and transmit on all serial channels
— QUICC Engine module peripheral request interface (for SEC, PCI, IEEE Std. 1588™)
— Eight universal communication controllers (UCCs) on the MPC8360E and six UCCs on the MPC8358E
supporting the following protocols and interfaces (not all of them simultaneously):
– IEEE 1588 protocol supported
Memory Controllers
GPCM/UPM/SDRAM
32/64 DDR Interface Unit
PCI Bridge
Local Bus
Bus Arbitration
DUART
Dual I2C
4 Channel DMA
Interrupt Controller
Protection & Configuration
System Reset
Clock Synthesizer
System Interface Unit
(SIU)
Local
Baud Rate
Generators
Multi-User
RAM
UCC8
Parallel I/O
Accelerators
Dual 32-Bit RISC CP
Serial DMA
&
2 Virtual
DMAs
2 GMII/
RGMII/TBI/RTBI
6 MII/
RMII
4 TDM Ports
1 UTOPIA/POS
(31/124 MPHY)
Serial Interface
QUICC Engine Module
JTAG/COP
Power
Management
Timers
FPU
Classic G2 MMUs
32KB
D-Cache
32KB
I-Cache
Security Engine
e300 Core
PCI
DDRC
UCC5
UCC4
UCC3
UCC2
UCC1
USB
SPI2
Time Slot Assigner
SPI1
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