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MPC8378VRAJFA 其他数据使用手册 - Freescale（飞思卡尔）
制造商:
Freescale（飞思卡尔）
分类:
微处理器
封装:
TEPBGA-689
描述:
微处理器 - MPU 8378 PBGA ST PbFr No ENC
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
典型应用电路图在P10P11P81
原理图在P2
封装尺寸在P89P90
型号编码规则在P123P124
技术参数、封装参数在P2P3P4P5P6P7P8P9P10P11P12P13
电气规格在P6P7P13P14P15P16P17P18P22P23P24P25
型号编号列表在P123P124
导航目录
MPC8378VRAJFA数据手册
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© 2008-2012 Freescale Semiconductor, Inc. All rights reserved.
Freescale Semiconductor
Technical Data
Freescale reserves the right to change the detail specifications as may be required
to permit improvements in the design of its products.
This document provides an overview of the MPC8378E
PowerQUICC II Pro processor features, including a block
diagram showing the major functional components. This
chip is a cost-effective, low-power, highly integrated host
processor that addresses the requirements of several
printing and imaging, consumer, and industrial
applications, including main CPUs and I/O processors in
printing systems, networking switches and line cards,
wireless LANs (WLANs), network access servers (NAS),
VPN routers, intelligent NIC, and industrial controllers.
This chip extends the PowerQUICC family, adding higher
CPU performance, additional functionality, and faster
interfaces while addressing the requirements related to
time-to-market, price, power consumption, and package
size.
1Overview
This chip incorporates the e300c4s core, which includes
32 KB of L1 instruction and data caches and on-chip
memory management units (MMUs). The device offers
two enhanced three-speed 10, 100, 1000 Mbps Ethernet
interfaces, a DDR1/DDR2 SDRAM memory controller, a
flexible, a 32-bit local bus controller, a 32-bit PCI
controller, an optional dedicated security engine, a USB
2.0 dual-role controller, a programmable interrupt
Document Number: MPC8378EEC
Rev. 8, 05/2012
Contents
1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2. Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . 6
3. Power Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 10
4. Clock Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . 13
5. RESET Initialization . . . . . . . . . . . . . . . . . . . . . . . . 15
6. DDR1 and DDR2 SDRAM . . . . . . . . . . . . . . . . . . . 16
7. DUART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
8. Ethernet: Enhanced Three-Speed Ethernet (eTSEC) 23
9. USB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
10. Local Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
11. Enhanced Secure Digital Host Controller (eSDHC) 49
12. JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
13. I
2
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
14. PCI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
15. PCI Express . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
16. Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
17. GPIO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
18. IPIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
19. SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
20. High-Speed Serial Interfaces (HSSI) . . . . . . . . . . . . 79
21. Package and Pin Listings . . . . . . . . . . . . . . . . . . . . . 89
22. Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
23. Thermal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
24. System Design Information . . . . . . . . . . . . . . . . . . 121
25. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 123
26. Document Revision History . . . . . . . . . . . . . . . . . . 125
MPC8378E
PowerQUICC II Pro Processor
Hardware Specifications
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