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PIC16C64A-04E/PT
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PIC16C64A-04E/PT数据手册
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PIC16C64A
DS80095A-page 2 2001 Microchip Technology Inc.
4. Module: SSP (SPI Mode)
When the SPI is using Timer2/2 as the clock
source, a shorter than expected SCK pulse may
occur on the first bit of the transmitted/received
data (Figure 1).
FIGURE 1: SCK PULSE VARIATION
USING TIMER2/2
Work around
To avoid producing the short pulse, turn off Timer2
and clear the TMR2 register, load the SSPBUF
with the data to transmit, and then turn Timer2
back on. Refer to Example 1 for sample code.
EXAMPLE 1: AVOIDING THE INITIAL
SHORT SCK PULSE
5. Module: Timer0
The TMR0 register may increment when the WDT
postscaler is switched to the Timer0 prescaler. If
TMR0 = FFh, this will cause TMR0 to overflow
(setting T0IF).
Work around
Follow the following sequence:
a) Read the 8-bit TMR0 register into the
W register
b) Clear the TMR0 register
c) Assign WDT postscaler to Timer0
d) Write W register to TMR0
6. Module: Timer1
The Timer1 value may unexpectedly increment if
either the TMR1H, or the TMR1L register is writ-
ten. If Timer1 is ON and then turned OFF, perform-
ing any write instruction with TMR1H as the
destination, may cause TMR1L to increment.
EXAMPLE 2: TMR1L INCREMENT
(CASE 1)
EXAMPLE 3: TMR1L INCREMENT
(CASE 2)
If Timer1 is ON and then turned OFF when
TMR1H:TMR1L = xx:FF, performing any write
instruction with TMR1L as the destination, may
cause TMR1H to increment.
EXAMPLE 4: TMR1H INCREMENT
Work around
To preserve Timer1 register values:
a) Read Timer1 register values into shadow
registers.
b) Perform any write instruction(s) on the
shadow registers.
c) Write the shadow register values back into
the Timer1 registers.
SD0
SCK
Write SSPBUF
bit0=1 bit1=0 bit2=1
. . . .
BSF STATUS, RP0 ;Bank 1
LOOP BTFSS SSPSTAT, BF ;Data received?
;(Xmit complete?)
GOTO LOOP ;No
BCF STATUS, RP0 ;Bank 0
MOVF SSPBUF, W ;W = SSPBUF
MOVWF RXDATA ;Save in user RAM
MOVF TXDATA, W ;W = TXDATA
BCF T2CON, TMR2ON ;Timer2 off
CLR TMR2 ;Clear Timer2
MOVWF SSPBUF ;Xmit New data
BSF T2CON, TMR2ON ;Timer2 on
BSF T1CON, TMR1ON
:
BCF T1CON, TMR1ON
MOVF TMR1H, 1
TMR1 value before MOVF instruction:
TMR1H:TMR1L = 3F:00
TMR1 value after MOVF instruction:
TMR1H:TMR1L = 3F:01
BSF T1CON, TMR1ON
:
BCF T1CON, TMR1ON
MOVF TMR1H, 1
TMR1 value before MOVF instruction:
TMR1H:TMR1L = FF:FF
TMR1 value after MOVF instruction:
TMR1H:TMR1L = FF:00
BSF T1CON, TMR1ON
BCF T1CON, TMR1ON
CLRF TMR1L
TMR1 value before CLRF instruction:
TMR1H:TMR1L = FF:FF
TMR1 value after CLRF instruction:
TMR1H:TMR1L = 00:00
(TMR1IF is not set.)

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