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PIC16F1509-I/ML 其他数据使用手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
8位微控制器
封装:
QFN-20
描述:
MICROCHIP PIC16F1509-I/ML 微控制器, 8位, 闪存, AEC-Q100, PIC16F150x, 20 MHz, 14 KB, 512 Byte, 20 引脚, QFN
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PIC16F1509-I/ML数据手册
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Configurable Logic Cell Tips ’n Tricks
DS41631B-page 2 2012 Microchip Technology Inc.
Data Gating
The outputs from the input multiplexers are directed to
the data gating stage of the CLC. The data gates can
be configured to direct each input signal as inverted or
non-inverted data signals. These signals are then
ANDed together in each gate. Finally, each gates
output can be inverted before going on to the logic
function stage of the CLC.
The basic logic that can be obtained in each gate is
summarized in Ta ble 1 and Figure 2.
FIGURE 2: CLC DATA GATING LOGIC
LOGIC FUNCTION SELECTION
The outputs from the four data gates are now inputs
into the logic function selection stage of the CLC. Here,
the data gate outputs can be gated down to one output
signal from a selection of eight logic functions. These
eight logic functions are shown in Figure 3 through
Figure 10.
TABLE 1: DATA GATING LOGIC
CLCxGLS(0-3) Registers LCxGyPOL bits Gate Logic
Inverted 55h 1 AND
55h 0 NAND
Non-Inverted AAh 1 NOR
AAh 0 OR
Not Connected 00h 0 Logic 0
00h 1 Logic 1
AND
NAND
NOR
OR
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