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PIC16F1947-I/MR
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PIC16F1947-I/MR数据手册
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PIC16(L)F1946/1947
DS80000497G-page 4 2010-2014 Microchip Technology Inc.
2. Module: ADC
2.1 Analog-to-Digital Converter (ADC)
Under certain device operating conditions, the
ADC conversion may not complete properly. When
this occurs, the ADC Interrupt Flag (ADIF) does
not get set, the ADGO/DONE
bit does not get
cleared and the conversion result does not get
loaded into the ADRESH and ADRESL result
registers.
Work around
Method 1: Select the dedicated RC
oscillator as the ADC conversion
clock source, and perform all
conversions with the device in
Sleep.
Method 2: Provide a fixed delay in software
to stop the A-to-D conversion
manually, after all ten bits are
converted, but before the
conversion would complete
automatically. The conversion is
stopped by clearing the GO/
DONE
bit in software. The GO/
DONE
bit must be cleared during
the last ½ T
AD cycle, before the
conversion would have
completed automatically. Refer to
Figure 1 for details.
FIGURE 1: INSTRUCTION CYCLE DELAY CALCULATION EXAMPLE
FOSC = 32 MHz
TCY = 4/32 MHz = 125 nsec
TAD = 1 µsec, ADCS = FOSC/32
88 TCY
84 TCY
8 TCY
4 TCY
1 TAD
11 TAD
Stop the A/D conversion
between 10.5 and 11 T
AD
cycles.
See the Analog-to-Digital
Conversion Timing diagram
in the Analog-to-Digital
Converter section of the
DS41414 data sheet.
}
See the ADC Clock Period (T
AD) vs. Device Operating Frequencies table, in the Analog-to-Digital Converter
section of the DS41414 data sheet.

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