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PIC18F23K22-E/SP 其他数据使用手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
微控制器
封装:
SPDIP-28
描述:
28 /40/ 44引脚，低功耗，高性能的微控制器采用nanoWatt XLP技术 28/40/44-Pin, Low-Power, High-Performance Microcontrollers with nanoWatt XLP Technology
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PIC18F23K22-E/SP数据手册
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PIC18(L)F23/24/43/44K22
DS80000512J-page 2 2010-2015 Microchip Technology Inc.
TABLE 2: SILICON ISSUE SUMMARY
Module Feature
Item
No.
Issue Summary
Affected
Revisions
(1)
A1 A2
Comparators CxSYNC Control 1. The comparator output to the device
pin (Cx) always bypasses the Timer1
synchronization latch.
X
Clock Switching Fail-Safe Clock Monitor 2. When the FCMEN Configuration bit is
set and the IESO Configuration bit is
not set, then a clock failure during
Sleep will not be detected.
X X
Power-on Reset (POR) Power-on Reset 3. Transient current spikes on some
parts during power-up may cause the
part to become stuck in Reset.
X
Timer1/3/5 Gate Timer1/3/5 Gate 4. The Timer1/3/5 gate times cannot be
resolved to the two Least Significant
bits, when using F
OSC as the Timer1/
3/5 source.
X X
Timer1/3/5 Interrupt 5. When the timer is operated in
Asynchronous External Input mode,
unexpected interrupt flag generation
may occur.
X X
EUSART EUSART Asynchronous
Operation
6.1 The EUSART asynchronous
operation may miss the Start bit
edge.
X
EUSART EUSART Synchronous
Operation
6.2 LSb of transmitted data can be
corrupt.
XX
MSSP (Master Synchronous
Serial Port)
SPI Master Mode 7. Buffer Full (BF) bit or MSSP Interrupt
Flag (SSPIF) bit becomes set half
SCK cycle too early.
XX
Note 1: Only those issues indicated in the last column apply to the current silicon revision.
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