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PIC18F4525-E/PT 其他数据使用手册 - Microchip（微芯）
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PIC18F4525-E/PT数据手册
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© 2008 Microchip Technology Inc. DS80224E-page 1
PIC18F2525/2620/4525/4620
The PIC18F2525/2620/4525/4620 Rev. A4 parts you
have received conform functionally to the Device Data
Sheet (DS39626D), except for the anomalies
described below. Any Data Sheet Clarification issues
related to the PIC18F2525/2620/4525/4620 will be
reported in a separate Data Sheet errata. Please check
the Microchip web site for any existing issues.
The following silicon errata apply only to
PIC18F2525/2620/4525/4620 devices with these
Device/Revision IDs:
1. Module: MSSP
In its current implementation, the I
2
C™ Master
mode operates as follows:
a) The Baud Rate Generator for I
2
C in Master
mode is slower than the rates specified in
Table 17-3 of the Device Data Sheet.
For this revision of silicon, use the values
shown in Table 1 in place of those shown in
Table 17-3 of the Device Data Sheet. The
differences are shown in bold text.
b) Use the following formula in place of the
one shown in Register 17-4 (SSPCON1) of
the Device Data Sheet for bit description
SSPM3:SSPM0 = 1000.
SSPADD = INT((F
CY/FSCL) – (FCY/1.111 MHz)) – 1
Date Codes that pertain to this issue:
All engineering and production devices.
TABLE 1: I
2
C™ CLOCK RATE w/BRG
Part Number Device ID Revision ID
PIC18F2525 00 1100 110 0 0100
PIC18F2620 00 1100 100 0 0100
PIC18F4525 00 1100 010 0 0100
PIC18F4620 00 1100 000 0 0100
The Device IDs (DEVID1 and DEVID2) are located at
addresses 3FFFFEh:3FFFFFh in the device’s
configuration space. They are shown in hexadecimal
in the format “DEVID2 DEVID1”.
FOSC FCY FCY * 2 BRG Value
F
SCL
(2 Rollovers of BRG)
40 MHz 10 MHz 20 MHz 0Eh 400 kHz
(1)
40 MHz 10 MHz 20 MHz 15h 312.5 kHz
40 MHz 10 MHz 20 MHz 59h 100 kHz
16 MHz 4 MHz 8 MHz 05h 400 kHz
(1)
16 MHz 4 MHz 8 MHz 08h 308 kHz
16 MHz 4 MHz 8 MHz 23h 100 kHz
4 MHz 1 MHz 2 MHz 01h 333 kHz
(1)
4 MHz 1 MHz 2 MHz 08h 100 kHz
4 MHz 1 MHz 2 MHz 00h 1 MHz
(1)
Note 1: The I
2
C™ interface does not conform to the 400 kHz I
2
C specification (which applies to rates greater than
100 kHz) in all details, but may be used with care where higher rates are required by the application.
PIC18F2525/2620/4525/4620 Rev. A4 Silicon Errata
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