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PIC18F46K40T-I/MV 其他数据使用手册 - Microchip（微芯）
制造商:
Microchip（微芯）
分类:
8位微控制器
封装:
UQFN-40
描述:
PIC 64MHz 闪存：32K@x16bit RAM：3.6KB
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PIC18F46K40T-I/MV数据手册
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若手册格式错乱，请下载阅览PDF原文件
2016 Microchip Technology Inc. DS80000712B-page 3
PIC18F26/45/46K40
Silicon Errata Issues
1. Module: Analog-to-Digital Converter
(ADC)
1.1 ADC Conversion
When using the ADCRC as the clock source for
ADCC, there is a delay of one instruction cycle
between the user setting the ADGO bit and
being able to read it set. This can lead to a false
conversion complete scenario (i.e., ADGO
being cleared), depending if the user code has a
bit clear test (BTFSC instruction on the ADGO
bit, immediately after setting the ADGO bit). See
code example below.
e.g.
BSF ADCON0, ADGO ; Start conversion
BTSFC ADCON0, ADGO ; Is conversion done?
GOTO $-1 ; No, test again
The BTFSC will pass the very first time in this
situation.
Work around
Add a NOP instruction after setting the ADGO bit
and before testing the bit for completion of
conversion (see code example below).
e.g.
BSF ADCON0, ADGO ; Start conversion
NOP
BTSFC ADCON0, ADGO ; Is conversion done?
GOTO $-1 ; No, test again
Affected Silicon Revisions
1.2 Computation Overflow Bit
If the sign bit of ADFLTR (bit 7 of ADFLTRH) is set,
the Computation Overflow bit will also be set, even
though this is not a legitimate case of an overflow
event.
Work around
None.
Affected Silicon Revisions
1.3 ADCRC Oscillator Operation in Sleep
If the part is in Sleep and the ADCRC oscillator is
used as the clock source to the ADC, the oscillator
continues to run after the conversion is complete.
This will increase the current consumption in Sleep
mode. The oscillator will stop after the device exits
Sleep mode and resumes normal code execution.
Work around
None.
Affected Silicon Revisions
1.4 ADC Conversion with FVR
Using the FVR as the positive voltage reference
for the ADC can cause an increase in missing
codes.
Work around
Increase the bit conversion time, known as TAD,
to 8 µs or higher.
Affected Silicon Revisions
Note: This document summarizes all silicon
errata issues from all revisions of silicon,
previous as well as current. Only the
issues indicated by the shaded column in
the following tables apply to the current
silicon revision (A4).
A3 A4
X
A3 A4
X
A3 A4
X
X
A3
A4
X
X
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