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器件3D模型￥ 5.873
PIC18F47K42T-I/ML 其他数据使用手册 - Microchip（微芯）
制造商:
Microchip（微芯）
封装:
QFN-44
描述:
PIC 64MHz 闪存：64K@x16bit
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P5P23P283P343P353P473P658P659Hot
典型应用电路图在P596P659
原理图在P26P79P91P100P109P177P227P229P230P273P284P296
封装尺寸在P771
标记信息在P767P768P769P770
封装信息在P767P772P773P774P776P780P781P782P784P785P786P787
功能描述在P226
技术参数、封装参数在P93P173P174P178P204P644P645P745P751P752P754P755
应用领域在P77P654
电气规格在P173P174P178P204P645
导航目录
PIC18F47K42T-I/ML数据手册
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若手册格式错乱，请下载阅览PDF原文件
2017 Microchip Technology Inc. Preliminary DS40001919A-page 1
PIC18(L)F26/27/45/46/47/55/56/57K42
Description
The PIC18(L)F26/27/45/46/47/55/56/57K42 microcontrollers are available in 28/40/44/48-pin devices. These devices
feature a 12-bit ADC with Computation (ADC
2
) automating Capacitive Voltage Divider (CVD) techniques for advanced
touch sensing, averaging, filtering, oversampling and threshold comparison, Temperature Sensor, Vectored Interrupt
Controller with fixed latency for handling interrupts, System Bus Arbiter, Direct Memory Access capabilities, UART with
support for Asynchronous, DMX, DALI and LIN transmissions, SPI, I
2
C, memory features like Memory Access Partition
(MAP) to support customers in data protection and bootloader applications, and Device Information Area (DIA) which
stores factory calibration values to help improve temperature sensor accuracy.
Core Features
• C Compiler Optimized RISC Architecture
• Operating Speed:
- Up to 64 MHz clock input
- 62.5 ns minimum instruction cycle
• Two Direct Memory Access (DMA) Controllers
- Data transfers to SFR/GPR spaces from
either Program Flash Memory, Data
EEPROM or SFR/GPR spaces
- User-programmable source and destination
sizes
- Hardware and software-triggered data
transfers
• System Bus Arbiter with User-Configurable
Priorities for Scanner and DMA1/DMA2 with
respect to the main line and interrupt execution
• Vectored Interrupt Capability
- Selectable high/low priority
- Fixed interrupt latency
- Programmable vector table base address
• 31-Level Deep Hardware Stack
• Low-Current Power-on Reset (POR)
• Configurable Power-up Timer (PWRT)
• Brown-Out Reset (BOR)
• Low-Power BOR (LPBOR) Option
• Windowed Watchdog Timer (WWDT)
- Variable prescaler selection
- Variable window size selection
- Configurable in hardware or software
Memory
• Up to 64 KB Flash Program Memory
• Up to 4 KB Data SRAM Memory
• Up to 1 KB Data EEPROM
• Memory Access Partition (MAP)
- Configurable boot and app region sizes with
individual write-protections
• Programmable Code Protection
• Device Information Area (DIA) stores:
- Unique IDs and Device IDs
- Temp Sensor factory-calibrated data
- Fixed Voltage Reference calibrated data
• Device Configuration Information (DCI) stores:
- Erase row size
- Number of write latches per row
- Number of user rows
- Data EEPROM memory size
- Pin count
Operating Characteristics
• Operating Voltage Range:
- 1.8V to 3.6V (PIC18LF26/27/45/46/55/56/
57K42)
- 2.3V to 5.5V (PIC18F26/27/45/46/47/55/56/
57K42)
• Temperature Range:
- Industrial: -40°C to 85°C
- Extended: -40°C to 125°C
Power-Saving Functionality
• DOZE mode: Ability to run CPU core slower than
the system clock
• IDLE mode: Ability to halt CPU core while internal
peripherals continue operating
• SLEEP mode: Lowest power consumption
• Peripheral Module Disable (PMD):
-
Ability to disable unused peripherals
to
minimize power consumption
28/40/44/48-Pin, Low-Power High-Performance
Microcontrollers with XLP Technology
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