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PIC18F67K90-I/MR 其他数据使用手册 - Microchip(微芯)
制造商:
Microchip(微芯)
分类:
微控制器
封装:
QFN-64
描述:
八十〇分之六十四引脚,高性能微控制器与LCD驱动器,并采用nanoWatt XLP技术 64/80-Pin, High-Performance Microcontrollers with LCD Driver and nanoWatt XLP Technology
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PIC18F67K90-I/MR数据手册
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若手册格式错乱,请下载阅览PDF原文件

2010-2015 Microchip Technology Inc. DS80000500M-page 5
PIC18F87K90 FAMILY
2. Module: Ports
The input leakage will not match the D060
specification in the data sheet. The leakage will
meet the 200 nA specification at TA = 25°C. At
T
A = 85°C, the leakage will be up to a maximum of
2 A.
Work around
None.
Affected Silicon Revisions
3. Module: High/Low-Voltage Detect (HLVD)
The high-to-low (VDIRMAG = 0) setting of the
HLVD may send initial interrupts. High trip points
that are close to the intended operating voltage are
susceptible to this behavior.
Work around
Select a lower trip voltage that allows consistent
start-up or clear any initial interrupts from the
HLVD on start-up.
Affected Silicon Revisions
4. Module: ECCP
The tri-state setting of the auto-shutdown feature
in the enhanced PWM will not successfully drive
the pin to tri-state. The pin will remain an output
and should not be driven externally. All tri-state
settings will be affected.
Work around
Use one of the other two auto-shutdown states
available, as outlined in the data sheet.
Affected Silicon Revisions
5. Module: EUSART
In Synchronous Transmit mode, data may be
corrupted if using the TXxIF bit to determine when
to load the TXREGx register. One or more of the
intended transmit messages may be incorrect.
Work around
A fixed delay added before loading the TXREGx
may not be a reliable work around. When loading
the TXREGx, check that the TRMT bit inside of the
TXSTAx register is set instead of checking the
TXxIF bit. The following code can be used:
EXAMPLE 1: EUSART SYNCHRONOUS
TRANSMIT WORK AROUND
Affected Silicon Revisions
A1 B1 B3 B5 C1 C3 C5 C6
XX
X XXX X
A1 B1 B3
B5 C1 C3 C5 C6
XXX
X XXX X
A1 B1 B3
B5 C1 C3 C5 C6
XXX
X XXX X
A1 B1 B3 B5 C1 C3 C5 C6
XXX
X XXX X
while(!TXSTAxbits.TRMT);
// wait to load TXREGx until TRMT is set
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