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STM32F767IIT6 其他数据使用手册 - ST Microelectronics（意法半导体）
制造商:
ST Microelectronics（意法半导体）
分类:
微控制器
封装:
LQFP-176
描述:
STM32F767IIT6 托盘
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P54P55P56P57P58P59P60P61P62P63P64P65Hot
典型应用电路图在P139P140P169
封装尺寸在P221P222P223P224P225P226P227P228P229P230P231P232
型号编码规则在P35P251
技术参数、封装参数在P110P156
电气规格在P107P108P109P110P111P112P113P114P115P116P117P118
导航目录
STM32F767IIT6数据手册
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This is information on a product in full production.
September 2017 DocID029041 Rev 6 1/255
STM32F765xx STM32F767xx
STM32F768Ax STM32F769xx
Arm
®
Cortex
®
-M7 32b MCU+FPU, 462DMIPS, up to 2MB Flash/
512+16+4KB RAM, USB OTG HS/FS, 28 com IF, LCD, DSI
Datasheet - production data
Features
• Core: Arm
®
32-bit Cortex
®
-M7 CPU with
DPFPU
, ART Accelerator
™
and L1-cache:
16 Kb
ytes I/D cache, allowing 0-wait stat
e
executio
n from embedded Flash and exter
nal
me
mories, up to 216 MHz, MP
U,
46
2 DMIPS/2.14 DMIPS/MHz (Dhrystone 2.1)
,
an
d DSP instructions.
• Memories
– Up to 2 Mbytes of Flash memory organized
into two banks allowing read-while-write
– SRAM: 512 Kbytes (including 128 Kbyt
es
of dat
a TCM RAM for critical real-time data)
+ 16 Kbytes of instruction TCM
RAM (for
c
ritical real-time routines) + 4 Kbytes of
backup SRAM
– Flexible external memory controller with up
to 32-bit dat
a bus: SRAM, PSRAM,
SD
RAM/LPSDR SDRAM, NOR/NA
ND
mem
ories
• Dual mode Quad-SPI
• Graphics
– Chrom-ART Accelerator
™
(DMA2D),
graphical hardware accelerator enablin
g
enh
anced graphical user interface
– Hardware JPEG codec
– LCD-TFT controller supporting up to
XGA
re
solution
–MIPI
®
DSI host controller supporting up to
720p 30 Hz resolution
• Clock, reset and supply management
– 1.7 V to 3.6 V application supply and I/Os
– POR, PDR, PVD and BOR
– Dedicated USB power
– 4-to-26 MHz crystal oscillator
– Internal 16 MHz factory-trimmed RC (1
%
ac
curacy)
– 32 kHz oscillator for RTC with calibration
– Internal 32 kHz RC with calibration
• Low-power
– Sleep, Stop and Standby modes
–V
BAT
supply for RTC, 32×32 bit backup
regist
ers + 4 Kbytes backup SRAM
• 3×12-bit, 2.4 MSPS ADC: up to 24 channels
• Digital filters for sigma delta modulator
(DFSDM), 8 channels / 4 filters
• 2×12-bit D/A converters
• General-purpose DMA: 16-strea
m DMA
contr
oller with FIFOs and burst support
• Up to 18 timers: up to thirteen 16-bit (1x low-
power 16-bit timer available in Stop mode) and
two 32-bit timers, each with
up to 4
IC/OC/PWM or pu
lse counter and quadratur
e
(
incremental) encoder input. All 15 timers
running up to 216 MHz. 2x watchd
ogs, SysTick
timer
• Deb
ug mode
– SWD & JTAG interfaces
–Cortex
®
-M7 Trace Macrocell
™
• Up to 168 I/O ports with interrupt capability
– Up to 164 fast I/Os up to 108 MHz
– Up to 166 5 V-tolerant I/Os
LQFP100 (14 × 14 mm)
UFBGA176 (10 x 10 mm)
&"'!
TFBGA216 (13 x 13 mm)
LQFP208 (28 x 28 mm)
WLCSP180
(0.4 mm pitch)
LQFP176 (24 × 24 mm)
LQFP144 (20 × 20 mm)
TFBGA100 (8 x 8 mm)
www.st.com
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