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STM32L011F4U3TR 其他数据使用手册 - ST Microelectronics(意法半导体)
制造商:
ST Microelectronics(意法半导体)
封装:
QFN
描述:
ARM MCU微控制单元, STM32 Family STM32L0 Series Microcontrollers, ARM 皮质-M0+, 32位, 32 MHz, 16 KB, 2 KB
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P60P61P62P63P64P65P66P67P68P69P70P71Hot
典型应用电路图在P144P145P178
封装尺寸在P230P231P232P233P234P235P236P237P238P239P240P241
型号编码规则在P251P252P253P254
技术参数、封装参数在P56P110
电气规格在P108P109P110P111P112P113P114P115P116P117P118P119
型号编号列表在P2
导航目录
STM32L011F4U3TR数据手册
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This is information on a product in full production.
July 2017 DocID029172 Rev 2 1/256
STM32L4A6xG
Ultra-low-power ARM
®
Cortex
®
-M4 32-bit MCU+FPU, 100DMIPS, 1MB
Flash, 320KB SRAM, USB OTG FS, audio, AES+HASH, ext. SMPS
Datasheet - production data
Features
• Ultra-low-power with FlexPowerControl
– 1.71 V to 3.6 V power supply
– -40 °C to 85/125 °C temperature range
– 320 nA in V
BAT
mode: supply for RTC and
32x32-bit backup registers
– 25 nA Shutdown mode (5 wakeup pins)
– 108 nA Standby mode (5 wakeup pins)
– 426 nA Standby mode with RTC
– 2.57 µA Stop 2 mode, 2.86 µA Stop 2 with
RTC
– 91 µA/MHz run mode (LDO Mode)
– 37 A/MHz run mode (@3.3 V SMPS
Mode)
– Batch acquisition mode (BAM)
– 5 µs wakeup from Stop mode
– Brown out reset (BOR) in all modes except
shutdown
– Interconnect matrix
• Core: ARM
®
32-bit Cortex
®
-M4 CPU with FPU,
Adaptive real-time accelerator (ART
Accelerator™) allowing 0-wait-state execution
from Flash memory, frequency up to 80 MHz,
MPU, 100 DMIPS and DSP instructions
• Performance benchmark
– 1.25 DMIPS/MHz (Drystone 2.1)
– 273.55 Coremark
®
(3.42 Coremark/MHz @
80 MHz)
• Energy benchmark
– 217 ULPBENCH™ score
• 16 x timers: 2 x 16-bit advanced motor-control,
2 x 32-bit and 5 x 16-bit general purpose,
2 x 16-bit basic, 2 x low-power 16-bit timers
(available in Stop mode), 2 x watchdogs,
SysTick timer
• RTC with HW calendar, alarms and calibration
• Up to 136 fast I/Os, most 5 V-tolerant, up to 14
I/Os with independent supply down to 1.08 V
• Dedicated Chrom-ART Accelerator™ for
enhanced graphic content creation (DMA2D)
• 8- to 14-bit camera interface up to 32 MHz
(black&white) or 10 MHz (color)
• Encryption hardware accelerator: AES
(128/256-bit key), HASH (SHA-256)
• Memories
– 1 MB Flash, 2 banks read-while-write,
proprietary code readout protection
– 320 KB of SRAM including 64 KB with
hardware parity check
– External memory interface for static
memories supporting SRAM, PSRAM,
NOR and NAND memories
– Dual-flash Quad SPI memory interface
• Clock Sources
– 4 to 48 MHz crystal oscillator
– 32 kHz crystal oscillator for RTC (LSE)
– Internal 16 MHz factory-trimmed RC (±1%)
– Internal low-power 32 kHz RC (±5%)
– Internal multispeed 100 kHz to 48 MHz
oscillator, auto-trimmed by LSE (better than
±0.25% accuracy)
– Internal 48 MHz with clock recovery
– 3 PLLs for system clock, USB, audio, ADC
• LCD 8 × 40 or 4 × 44 with step-up converter
• Up to 24 capacitive sensing channels: support
touchkey, linear and rotary touch sensors
• 4 x digital filters for sigma delta modulator
UFBGA132 (7 × 7)
LQFP144 (20 × 20)
UFBGA169 (7 x 7)
WLCSP100
LQFP100 (14 x 14)
LQFP64 (10 x 10)
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