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STM32L431CBY7TR 其他数据使用手册 - ST Microelectronics（意法半导体）
制造商:
ST Microelectronics（意法半导体）
封装:
WLCSP-48
描述:
ARM微控制器 - MCU Ultra-low-power with FPU ARM Cortex-M4 MCU 80 MHz with 128 Kbytes Flash
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P54P55P56P57P58P59P60P61P62P63P64P65Hot
典型应用电路图在P116P117P149
封装尺寸在P176P177P178P179P180P181P182P183P184P185P186P187
型号编码规则在P203P204P205
技术参数、封装参数在P51P85
电气规格在P83P84P85P86P87P88P89P90P91P92P93P94
型号编号列表在P2
导航目录
STM32L431CBY7TR数据手册
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This is information on a product in full production.
June 2017 DocID028800 Rev 2 1/207
STM32L431xx
Ultra-low-power ARM
®
Cortex
®
-M4 32-bit MCU+FPU, 100DMIPS,
up to 256KB Flash, 64KB SRAM, analog, audio
Datasheet - production data
Features
• Ultra-low-power with FlexPowerControl
– 1.71 V to 3.6 V power supply
– -40 °C to 85/105/125 °C temperature range
– 200 nA in V
BAT
mode: supply for RTC and
32x32-bit backup registers
– 8 nA Shutdown mode (5 wakeup pins)
– 28 nA Standby mode (5 wakeup pins)
– 280 nA Standby mode with RTC
– 1.0 µA Stop 2 mode, 1.28 µA with RTC
– 84 µA/MHz run mode
– Batch acquisition mode (BAM)
– 4 µs wakeup from Stop mode
– Brown out reset (BOR)
– Interconnect matrix
• Core: ARM
®
32-bit Cortex
®
-M4 CPU with FPU,
Adaptive real-time accelerator (ART
Accelerator™) allowing 0-wait-state execution
from Flash memory, frequency up to 80 MHz,
MPU, 100DMIPS and DSP instructions
• Performance benchmark
– 1.25 DMIPS/MHz (Drystone 2.1)
– 273.55 CoreMark
®
(3.42 CoreMark/MHz @
80 MHz)
• Energy benchmark
– 176.7 ULPBench
®
score
• Clock Sources
– 4 to 48 MHz crystal oscillator
– 32 kHz crystal oscillator for RTC (LSE)
– Internal 16 MHz factory-trimmed RC (±1%)
– Internal low-power 32 kHz RC (±5%)
– Internal multispeed 100 kHz to 48 MHz
oscillator, auto-trimmed by LSE (better than
±0.25 % accuracy)
– Internal 48 MHz with clock recovery
– 2 PLLs for system clock, audio, ADC
• Up to 83 fast I/Os, most 5 V-tolerant
• RTC with HW calendar, alarms and calibration
• Up to 21 capacitive sensing channels: support
touchkey, linear and rotary touch sensors
• 11x timers: 1x 16-bit advanced motor-control,
1x 32-bit and 2x 16-bit general purpose, 2x 16-
bit basic, 2x low-power 16-bit timers (available
in Stop mode), 2x watchdogs, SysTick timer
• Memories
– Up to 256 KB single bank Flash,
proprietary code readout protection
– 64 KB of SRAM including 16 KB with
hardware parity check
– Quad SPI memory interface
• Rich analog peripherals (independent supply)
– 1× 12-bit ADC 5 Msps, up to 16-bit with
hardware oversampling, 200 µA/Msps
– 2x 12-bit DAC, low-power sample and hold
– 1x operational amplifier with built-in PGA
– 2x ultra-low-power comparators
• 16x communication interfaces
– 1x SAI (serial audio interface)
–3x I2C FM+(1 Mbit/s), SMBus/PMBus
– 4x USARTs (ISO 7816, LIN, IrDA, modem)
– 1x LPUART (Stop 2 wake-up)
– 3x SPIs (4x SPIs with the Quad SPI)
– CAN (2.0B Active) and SDMMC interface
– SWPMI single wire protocol master I/F
– IRTIM (Infrared interface)
• 14-channel DMA controller
• True random number generator
• CRC calculation unit, 96-bit unique ID
UFBGA100 (7×7)
LQFP64 (10x10)
UFBGA64 (5x5)
LQFP48 (7x7)
LQFP100 (14x14)
WLCSP64
UFQFPN32 (5x5)
WLCSP49UFQFPN48 (7x7)
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