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STM8S103K3T6C 其他数据使用手册 - ST Microelectronics（意法半导体）
制造商:
ST Microelectronics（意法半导体）
分类:
微控制器
封装:
LQFP-32
描述:
STM8S103 系列 8 kB 闪存 1 kB RAM 8位 表面贴装 微控制器 - LQFP-32
Pictures:
3D模型
符号图
焊盘图
引脚图
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页面导航:
典型应用电路图在P81P85
原理图在P11
封装尺寸在P89P90P91P92P93P94P95P96P97P98P99P100
型号编码规则在P107P108P110P111
封装信息在P108
功能描述在P12P13P14P15P16P17P18P19P20
技术参数、封装参数在P51P87
电气规格在P25P50P51P52P53P54P55P56P57P58P59P60
导航目录
STM8S103K3T6C数据手册
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若手册格式错乱，请下载阅览PDF原文件
This is information on a product in full production.
February 2017 DocID15441 Rev 14 1/121
STM8S103F2 STM8S103F3
STM8S103K3
Access line, 16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash,
data EEPROM,10-bit ADC, 3 timers, UART, SPI, I²C
Datasheet - production data
Features
Core
• 16 MHz advanced STM8 core with Harvard
architecture and 3-stage pipeline
• Extended instruction set
Memories
• Program memory: 8 Kbyte Flash; data
retention 20 years at 55 °C after 10 kcycle
• Data memory: 640 byte true data EEPROM;
endurance 300 kcycle
• RAM: 1 Kbyte
Clock, reset and supply management
• 2.95 to 5.5 V operating voltage
• Flexible clock control, 4 master clock sources
– Low power crystal resonator oscillator
– External clock input
– Internal, user-trimmable 16 MHz RC
– Internal low-power 128 kHz RC
• Clock security system with clock monitor
• Power management:
– Low-power modes (wait, active-halt, halt)
– Switch-off peripheral clocks individually
• Permanently active, low-consumption power-
on and power-down reset
Interrupt management
• Nested interrupt controller with 32 interrupts
• Up to 27 external interrupts on 6 vectors
Timers
• Advanced control timer: 16-bit, 4 CAPCOM
channels, 3 complementary outputs, dead-time
insertion and flexible synchronization
• 16-bit general purpose timer, with 3 CAPCOM
channels (IC, OC or PWM)
• 8-bit basic timer with 8-bit prescaler
• Auto wake-up timer
• Window watchdog and independent watchdog
timers
Communication interfaces
• UART with clock output for synchronous
operation, SmartCard, IrDA, LIN master mode
• SPI interface up to 8 Mbit/s
• I2C interface up to 400 kbit/s
Analog to digital converter (ADC)
• 10-bit, ±1 LSB ADC with up to 5 multiplexed
channels, scan mode and analog watchdog
I/Os
• Up to 28 I/Os on a 32-pin package including
21 high sink outputs
• Highly robust I/O design, immune against
current injection
Unique ID
• 96-bit unique key for each device
06Y9
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[PP
8)4)31
[PP
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PPERG\
8)4)31
[PP
62
PLOV
6',3
PLOV
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