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TC58BVG0S3HBAI6 其他数据使用手册 - Toshiba(东芝)
制造商:
Toshiba(东芝)
分类:
存储芯片
封装:
VFBGA-67
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TC58BVG0S3HBAI6数据手册
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TC58BVG0S3HBAI6
2012-08-31C
1
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
1 GBIT (128M × 8 BIT) CMOS NAND E
2
PROM
DESCRIPTION
The TC58BVG0S3HBAI6 is a single 3.3V 1 Gbit (1,107,296,256 bits) NAND Electrically Erasable and
Programmable Read-Only Memory (NAND E
2
PROM) organized as (2048 + 64) bytes × 64 pages × 1024blocks.
The device has a 2112-byte static register which allows program and read data to be transferred between the
register and the memory cell array in 2112-bytes increments. The Erase operation is implemented in a single block
unit (128 Kbytes + 4 Kbytes: 2112 bytes × 64 pages).
The TC58BVG0S3HBAI6 is a serial-type memory device which utilizes the I/O pins for both address and data
input/output as well as for command inputs. The Erase and Program operations are automatically executed making
the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still
cameras and other systems which require high-density non-volatile memory data storage.
The TC58BVG0S3HBAI6 has ECC logic on the chip and 8bit read errors for each 528Bytes can be corrected
internally.
FEATURES
• Organization x8
Memory cell array 2112 × 64K × 8
Register 2112× 8
Page size 2112 bytes
Block size (128K + 4K) bytes
• Modes
Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy,
ECC Status Read
• Mode control
Serial input/output
Command control
• Number of valid blocks
Min 1004 blocks
Max 1024 blocks
• Power supply
V
CC
= 2.7V to 3.6V
• Access time
Cell array to register 40 µs typ.
Serial Read Cycle 25 ns min (CL=50pF)
• Program/Erase time
Auto Page Program 330 µs/page typ.
Auto Block Erase 2.5 ms/block typ.
• Operating current
Read (25 ns cycle) 30 mA max.
Program (avg.) 30 mA max
Erase (avg.) 30 mA max
Standby 50 µA max
• Package
P-VFBGA67-0608-0.80-001 (Weight: 0.095 g typ.)
• 8bit ECC for each 528Bytes is implemented on a chip.
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