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TMS320VC33PGE150 其他数据使用手册 - TI（德州仪器）
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TI（德州仪器）
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DSP数字信号处理器
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LQFP-144
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TEXAS INSTRUMENTS TMS320VC33PGE150 数字信号处理器
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TMS320VC33PGE150数据手册
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Please be aware that an important notice concerning availab ility, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SM320VC33-EP
DIGITAL SIGNAL PROCESSOR
SGUS037C -- AUGUST 2002 -- REVISED JANUARY 2003
1
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251--1443
D Controlled Baseline
-- One Assembly/Test Site, One Fabrication
Site
D Extended Temperature Performance of
-- 4 0 °C to 100°C(ASuffix),and
-- 5 5 °C to 125°C (M Suffix)
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product Change Notification
D Qualification Pedigree
†
D High-Performance Floating-Point Digital
Signal Processor (DSP):
-- SM320VC33-120EP (PGE Suffix)
-- 17-ns Instruction Cycle Time
-- 120 Million Floating-Point Operations
Per Second (MFLOPS)
-- 60 Million Instructions Per Second
(MIPS)
-- SM320VC33-150EP (GNM Suffix)
-- 13-ns Instruction Cycle Time
-- 150 Million Floating-Point Operations
Per Second (MFLOPS)
-- 75 Million Instructions Per Second
(MIPS)
D 34K × 32-Bit (1.1M-bit) On-Chip Words of
Dual-Access Static Random-Access
Memory (SRAM) Configured in 2 × 16K plus
2 × 1K Blocks to improve Internal
Performance
D x5 Phase-Locked Loop (PLL) Clock
Generator
D Very Low Power: < 200 mW @ 150 MFLOPS
D 32-Bit High-Performance CPU
D 16-/32-Bit Integer and 32-/40-Bit
Floating-Point Operations
D Four Internally Decoded Page Strobes to
Simplify Interface to I/O and Memory
Devices
D Boot-Program Loader
D EDGEMODE Selectable External Interrupts
D 32-Bit Instruction Word, 24-Bit Addresses
D Eight Extended-Precision Registers
D Fabricated Using the 0.18-μm(l
eff
-Effective
Gate Length) TImeline™ Technology by
Texas Instruments (TI)
D On-Chip Memory-Mapped Peripherals:
-- O n e S e r i a l P o r t
-- T w o 3 2 - B i t T i m e r s
-- Direct Memory Access (DMA)
Coprocessor for Concurrent I/O and CPU
Operation
D 144-Pin Low-Profile Quad Flatpack (LQFP)
(PGE Suffix) and 144-Pin Non-hermetic
Ceramic Ball Grid Array (CBGA)
(GNM Suffix)
D Two Address Generators With Eight
Auxiliary Registers and Two Auxiliary
Register Arithmetic Units (ARAUs)
D Two Low-Power Modes
D Two- and Three-Operand Instructions
D Parallel Arithmetic/Logic Unit (ALU) and
Multiplier Execution in a Single Cycle
D Block-Repeat Capability
D Zero-Overhead Loops With Single-Cycle
Branches
D Conditional Calls and Returns
D Interlocked Instructions for
Multiprocessing Support
D Bus-Control Registers Configure
Strobe-Control Wait-State Generation
D 1.8-V (Core) and 3.3-V (I/O) Supply Voltages
†
Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range.
This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this
component beyond specified performance and environmental limits.
TImeline and SM320C3x are trademarks of Texas Instruments.
Other trademarks are the property of their respective owners.
Copyright © 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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