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BT-MSPAUDSOURCE 产品设计参考手册 - TI(德州仪器)
制造商:
TI(德州仪器)
分类:
开发套件
描述:
TEXAS INSTRUMENTS BT-MSPAUDSOURCE 无线开发板, 蓝牙 + MSP430音频源基准
Pictures:
3D模型
符号图
焊盘图
引脚图
产品图
页面导航:
引脚图在P9P82P84P85P86P87P89P91P93P94P96Hot
典型应用电路图在P2
原理图在P3P4P5P81
封装尺寸在P8P108P109P111P112P113
标记信息在P105P108P109P110
封装信息在P2P8P105P107P108P109P110P111P112P113
技术参数、封装参数在P20P21P22P23P24P25P26P27P28P29P30P31
应用领域在P2P122
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BT-MSPAUDSOURCE数据手册
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Folder
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Buy
Technical
Documents
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Software
Support &
Community
Reference
Design
MSP430F5229
,
MSP430F5227
,
MSP430F5224
,
MSP430F5222
MSP430F5219, MSP430F5217, MSP430F5214, MSP430F5212
SLAS718F –NOVEMBER 2012–REVISED NOVEMBER 2015
MSP430F522x, MSP430F521x Mixed-Signal Microcontrollers
1 Device Overview
1.1 Features
1
• Dual-Supply Voltage Device • Unified Clock System
– Primary Supply (AVCC, DVCC): – FLL Control Loop for Frequency Stabilization
– Low-Power Low-Frequency Internal Clock
• Powered From External Supply:
Source (VLO)
3.6 V Down to 1.8 V
– Low-Frequency Trimmed Internal Reference
• Up to 22 General-Purpose I/Os With up to
Source (REFO)
Four External Interrupts
– 32-kHz Watch Crystals (XT1)
– Low-Voltage Interface Supply (DVIO):
– High-Frequency Crystals up to 32 MHz (XT2)
• Powered From Separate External Supply:
1.62 V to 1.98 V
• 16-Bit Timer TA0, Timer_A With Five
Capture/Compare Registers
• Up to 31 General-Purpose I/Os With up to
12 External Interrupts
• 16-Bit Timer TA1, Timer_A With Three
Capture/Compare Registers
• Serial Communications
• 16-Bit Timer TA2, Timer_A With Three
• Ultra-Low Power Consumption
Capture/Compare Registers
– Active Mode (AM):
• 16-Bit Timer TB0, Timer_B With Seven
All System Clocks Active
Capture/Compare Shadow Registers
290 µA/MHz at 8 MHz, 3.0 V, Flash Program
Execution (Typical)
• Two Universal Serial Communication Interfaces
150 µA/MHz at 8 MHz, 3.0 V, RAM Program
– USCI_A0 and USCI_A1 Each Support:
Execution (Typical)
• Enhanced UART With Automatic Baud Rate
– Standby Mode (LPM3):
Detection
Real-Time Clock (RTC) With Crystal, Watchdog,
• IrDA Encoder and Decoder
and Supply Supervisor Operational, Full RAM
• Synchronous SPI
Retention, Fast Wakeup:
– USCI_B0 and USCI_B1 Each Support:
1.9 µA at 2.2 V, 2.1 µA at 3.0 V (Typical)
• I
2
C
Low-Power Oscillator (VLO), General-Purpose
Counter, Watchdog, and Supply Supervisor
• Synchronous SPI
Operational, Full RAM Retention, Fast Wakeup:
• 10-Bit Analog-to-Digital Converter (ADC) With
1.4 µA at 3.0 V (Typical)
Internal Reference, Sample-and-Hold
– Off Mode (LPM4):
• Comparator
Full RAM Retention, Supply Supervisor
• Hardware Multiplier Supports 32-Bit Operations
Operational, Fast Wakeup:
• Serial Onboard Programming, No External
1.1 µA at 3.0 V (Typical)
Programming Voltage Needed
– Shutdown Mode (LPM4.5):
• Three-Channel Internal DMA
0.18 µA at 3.0 V (Typical)
• Basic Timer With RTC Feature
• Wake up From Standby Mode in 3.5 µs (Typical)
• Section 3 Summarizes Available Family Members
• 16-Bit RISC Architecture, Extended Memory, up to
• For Complete Module Descriptions, See the
25-MHz System Clock
MSP430x5xx and MSP430x6xx Family User's
• Flexible Power-Management System
Guide (SLAU208)
– Fully Integrated LDO With Programmable
• For Design Guidelines, See Designing With
Regulated Core Supply Voltage
MSP430F522x and MSP430F521x Devices
– Supply Voltage Supervision, Monitoring, and
(SLAA558)
Brownout
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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