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© 2006 Microchip Technology Inc. 70046E-page iii
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M
SECTION 1. INTRODUCTION 1-1
Introduction ......................................................................................................................................................1-2
Manual Objective .............................................................................................................................................1-2
Device Structure ...............................................................................................................................................1-3
Development Support ......................................................................................................................................1-4
Style and Symbol Conventions ........................................................................................................................1-4
Related Documents ..........................................................................................................................................1-6
Revision History ...............................................................................................................................................1-7
SECTION 2. CPU 2-1
Introduction ......................................................................................................................................................2-2
Programmer’s Model ........................................................................................................................................2-4
Software Stack Pointer .....................................................................................................................................2-8
CPU Register Descriptions .............................................................................................................................2-11
Arithmetic Logic Unit (ALU) ............................................................................................................................2-17
DSP Engine ....................................................................................................................................................2-18
Divide Support ................................................................................................................................................2-27
Instruction Flow Types ...................................................................................................................................2-27
Loop Constructs .............................................................................................................................................2-30
Address Register Dependencies ....................................................................................................................2-35
Register Maps ................................................................................................................................................2-38
Related Application Notes ..............................................................................................................................2-40
Revision History .............................................................................................................................................2-41
SECTION 3. DATA MEMORY 3-1
Introduction ......................................................................................................................................................3-2
Data Space Address Generator Units (AGUs) .................................................................................................3-5
Modulo Addressing ..........................................................................................................................................3-7
Bit-Reversed Addressing ...............................................................................................................................3-14
Control Register Descriptions .........................................................................................................................3-18
Related Application Notes ..............................................................................................................................3-23
Revision History .............................................................................................................................................3-24
SECTION 4. PROGRAM MEMORY 4-1
Program Memory Address Map .......................................................................................................................4-2
Program Counter ..............................................................................................................................................4-4
Data Access from Program Memory ................................................................................................................4-4
Program Space Visibility from Data Space ......................................................................................................4-8
Program Memory Writes ................................................................................................................................4-10
PSV Code Examples ......................................................................................................................................4-11
Related Application Notes ..............................................................................................................................4-12
Revision History .............................................................................................................................................4-13
Table of Contents

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