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TMS320C6657CZH 产品设计参考手册 - TI（德州仪器）
制造商:
TI（德州仪器）
分类:
DSP数字信号处理器
封装:
FCBGA-625
描述:
TEXAS INSTRUMENTS TMS320C6657CZH 芯片, 数字信号处理器, 1GHZ, FCBGA-625
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原理图在P4P96P143P192
封装尺寸在P241
标记信息在P241P242
封装信息在P3P240P241P242
功能描述在P199
技术参数、封装参数在P35P36P37P38P39P40P41P42P43P44P45P46
应用领域在P1P153
电气规格在P36P37
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TMS320C6657CZH数据手册
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TMS320C6655, TMS320C6657
SPRS814C –MARCH 2012–REVISED MAY 2016
TMS320C6655 and TMS320C6657 Fixed and Floating-Point Digital Signal Processor
1 Device Overview
1
1.1 Features
1
• One (C6655) or Two (C6657) TMS320C66x™
DSP Core Subsystems (CorePacs), Each With
– 850 MHz (C6657 only), 1.0 GHz, or 1.25 GHz
C66x Fixed- and Floating-Point CPU Core
• 40 GMAC per Core for Fixed Point @ 1.25
GHz
• 20 GFLOP per Core for Floating Point @
1.25 GHz
• Multicore Shared Memory Controller (MSMC)
– 1024KB MSM SRAM Memory
(Shared by Two DSP C66x CorePacs for
C6657)
– Memory Protection Unit for Both MSM SRAM
and DDR3_EMIF
• Multicore Navigator
– 8192 Multipurpose Hardware Queues with
Queue Manager
– Packet-Based DMA for Zero-Overhead
Transfers
• Hardware Accelerators
– Two Viterbi Coprocessors
– One Turbo Coprocessor Decoder
• Peripherals
– Four Lanes of SRIO 2.1
• 1.24, 2.5, 3.125, and 5 GBaud Operation
Supported Per Lane
• Supports Direct I/O, Message Passing
• Supports Four 1×, Two 2×, One 4×, and Two
1× + One 2× Link Configurations
– PCIe Gen2
• Single Port Supporting 1 or 2 Lanes
• Supports up to 5 GBaud Per Lane
– HyperLink
• Supports Connections to Other KeyStone
Architecture Devices Providing Resource
Scalability
• Supports up to 40 Gbaud
– Gigabit Ethernet (GbE) Subsystem
• One SGMII Port
• Supports 10-, 100-, and 1000-Mbps
Operation
– 32-Bit DDR3 Interface
• DDR3-1333
• 8GB of Addressable Memory Space
– 16-Bit EMIF
– Universal Parallel Port
• Two Channels of 8 Bits or 16 Bits Each
• Supports SDR and DDR Transfers
– Two UART Interfaces
– Two Multichannel Buffered Serial Ports
(McBSPs)
– I
2
C Interface
– 32 GPIO Pins
– SPI Interface
– Semaphore Module
– Eight 64-Bit Timers
– Two On-Chip PLLs
• Commercial Temperature:
– 0°C to 85°C
• Extended Temperature:
– –40°C to 100°C
1.2 Applications
• Power Protection Systems
• Avionics and Defense
• Currency Inspection and Machine Vision
• Medical Imaging
• Other Embedded Systems
• Industrial Transportation Systems
1.3 Description
The C665x are high performance fixed- and floating-point DSPs that are based on TI's KeyStone multicore
architecture. Incorporating the new and innovative C66x DSP core, this device can run at a core speed of
up to 1.25 GHz. For developers of a broad range of applications, both C665x DSPs enable a platform that
is power-efficient and easy to use. In addition, the C665x DSPs are fully backward compatible with all
existing C6000™ family of fixed- and floating-point DSPs.
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