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TMS320C6726 产品设计参考手册 - TI（德州仪器）
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TI（德州仪器）
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浮点数字信号处理器
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引脚图在P19Hot
原理图在P5P12P40P68P80P93P97
封装尺寸在P111
封装信息在P109P111
技术参数、封装参数在P33P34P35P36P37P38P39P40P41P42P43P44
应用领域在P1P114
电气规格在P33P34P35P36P37P38P39P40P41P42P43P44
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TMS320C6726数据手册
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1.2.1 Device Compatibility
TMS320C6727, TMS320C6726, TMS320C6722
Floating-Point Digital Signal Processors
SPRS268E – MAY 2005 – REVISED JANUARY 2007
Real-Time Interrupt Timer (RTI). The real-time interrupt timer module includes:
• Two 32-bit counter/prescaler pairs
• Two input captures (tied to McASP direct memory access [DMA] events for sample rate measurement)
• Four compares with automatic update capability
• Digital Watchdog (optional) for enhanced system robustness
Clock Generation (PLL and OSC). The C672x DSP includes an on-chip oscillator that supports crystals
in the range of 12 MHz to 25 MHz. Alternatively, the clock can be provided externally through the CLKIN
pin.
The DSP includes a flexible, software-programmable phase-locked loop (PLL) clock generator. Three
different clock domains (SYSCLK1, SYSCLK2, and SYSCLK3) are generated by dividing down the PLL
output. SYSCLK1 is the clock used by the CPU, memory controller, and memories. SYSCLK2 is used by
the peripheral subsystem and dMAX. SYSCLK3 is used exclusively for the EMIF.
The TMS320C672x floating-point digital signal processors are based on the new C67x+ CPU. This core is
code-compatible with the C67x CPU core used on the TMS320C671x DSPs, but with significant
enhancements including additional floating-point instructions. See Section 2.2
4 TMS320C6727, TMS320C6726, TMS320C6722 DSPs Submit Documentation Feedback
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