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TMS320C6748BZCE4 产品设计参考手册 - TI（德州仪器）
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TI（德州仪器）
分类:
DSP数字信号处理器
封装:
LFBGA-361
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TMS320C6748BZCE4数据手册
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TMS320C6748
SPRS590C–JUNE 2009– REVISED JUNE 2011
www.ti.com
5.9 Enhanced Direct Memory Access Controller
1 TMS320C6748 Fixed/Floating-Point DSP ........... 1
(EDMA3) .......................................... 101
1.1 Features .............................................. 1
5.10 External Memory Interface A (EMIFA) ............ 107
1.2 Description ........................................... 3
5.11 DDR2/mDDR Controller ........................... 119
1.3 Functional Block Diagram ............................ 5
5.12 Memory Protection Units .......................... 132
Revision History .............................................. 7
5.13 MMC / SD / SDIO (MMCSD0, MMCSD1) ......... 135
2 Device Overview ........................................ 9
5.14 Serial ATA Controller (SATA) ..................... 138
2.1 Device Characteristics ............................... 9
5.15 Multichannel Audio Serial Port (McASP) .......... 143
5.16 Multichannel Buffered Serial Port (McBSP) ....... 152
2.2 Device Compatibility ................................ 10
5.17 Serial Peripheral Interface Ports (SPI0, SPI1) .... 161
2.3 DSP Subsystem .................................... 11
5.18 Inter-Integrated Circuit Serial Ports (I2C) ......... 183
2.4 Memory Map Summary ............................. 22
5.19 Universal Asynchronous Receiver/Transmitter
2.5 Pin Assignments .................................... 25
(UART) ............................................ 187
2.6 Pin Multiplexing Control ............................ 28
5.20 Universal Serial Bus OTG Controller (USB0)
2.7 Terminal Functions ................................. 29
[USB2.0 OTG] ..................................... 189
5.21 Universal Serial Bus Host Controller (USB1)
2.8 Unused Pin Configurations ......................... 70
[USB1.1 OHCI] .................................... 196
3 Device Configuration ................................. 72
5.22 Ethernet Media Access Controller (EMAC) ....... 197
3.1 Boot Modes ......................................... 72
5.23 Management Data Input/Output (MDIO) .......... 205
3.2 SYSCFG Module ................................... 72
5.24 LCD Controller (LCDC) ............................ 207
3.3 Pullup/Pulldown Resistors .......................... 75
5.25 Host-Port Interface (UHPI) ........................ 222
4 Device Operating Conditions ....................... 76
5.26 Universal Parallel Port (uPP) ...................... 230
4.1 Absolute Maximum Ratings Over Operating
5.27 Video Port Interface (VPIF) ....................... 235
Junction Temperature Range
5.28 Enhanced Capture (eCAP) Peripheral ............ 241
(Unless Otherwise Noted) ................................. 76
5.29 Enhanced High-Resolution Pulse-Width Modulator
4.2 Recommended Operating Conditions .............. 77
(eHRPWM) ........................................ 244
4.3 Notes on Recommended Power-On Hours (POH)
5.30 Timers ............................................. 249
...................................................... 79
5.31 Real Time Clock (RTC) ........................... 251
4.4 Electrical Characteristics Over Recommended
5.32 General-Purpose Input/Output (GPIO) ............ 254
Ranges of Supply Voltage and Operating Junction
5.33 Programmable Real-Time Unit Subsystem (PRUSS)
Temperature (Unless Otherwise Noted) ............ 80
..................................................... 258
5 Peripheral Information and Electrical
5.34 Emulation Logic ................................... 261
Specifications .......................................... 81
6 Device and Documentation Support ............. 265
5.1 Parameter Information .............................. 81
6.1 Device Support .................................... 265
5.2 Recommended Clock and Control Signal Transition
Behavior ............................................ 82
6.2 Documentation Support ........................... 266
5.3 Power Supplies ..................................... 82
6.3 Community Resources ............................ 267
5.4 Reset ............................................... 83
7 Mechanical Packaging and Orderable
Information ............................................ 268
5.5 Crystal Oscillator or External Clock Input .......... 86
5.6 Clock PLLs ......................................... 87
7.1 Thermal Data for ZCE Package ................... 268
5.7 Interrupts ............................................ 92
7.2 Thermal Data for ZWT Package .................. 269
5.8 Power and Sleep Controller (PSC) ................. 96
6 Contents Copyright © 2009–2011, Texas Instruments Incorporated
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